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Message-ID: <CAP-5=fW3wf8wQ2DyQbKnbsKJhZSdjomxnEp6GGF4Ar7qykZTjQ@mail.gmail.com>
Date: Thu, 13 Apr 2023 09:36:23 -0700
From: Ian Rogers <irogers@...gle.com>
To: Alexandre Ghiti <alexghiti@...osinc.com>
Cc: Jonathan Corbet <corbet@....net>,
Peter Zijlstra <peterz@...radead.org>,
Ingo Molnar <mingo@...hat.com>,
Arnaldo Carvalho de Melo <acme@...nel.org>,
Mark Rutland <mark.rutland@....com>,
Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
Jiri Olsa <jolsa@...nel.org>,
Namhyung Kim <namhyung@...nel.org>,
Paul Walmsley <paul.walmsley@...ive.com>,
Palmer Dabbelt <palmer@...belt.com>,
Albert Ou <aou@...s.berkeley.edu>,
Atish Patra <atishp@...shpatra.org>,
Anup Patel <anup@...infault.org>,
Will Deacon <will@...nel.org>, Rob Herring <robh@...nel.org>,
linux-doc@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-perf-users@...r.kernel.org, linux-riscv@...ts.infradead.org,
linux-arm-kernel@...ts.infradead.org, paranlee <p4ranlee@...il.com>
Subject: Re: [PATCH 0/4] riscv: Allow userspace to directly access perf counters
On Thu, Apr 13, 2023 at 9:17 AM Alexandre Ghiti <alexghiti@...osinc.com> wrote:
>
> riscv used to allow direct access to cycle/time/instret counters,
> bypassing the perf framework, this patchset intends to allow the user to
> mmap any counter when accessed through perf. But we can't break the
> existing behaviour so we introduce a sysctl perf_user_access like arm64
> does, which defaults to the legacy mode described above.
>
> The core of this patchset lies in patch 4, the first 3 patches are
> simple fixes.
>
> base-commit-tag: v6.3-rc1
>
> Alexandre Ghiti (4):
> perf: Fix wrong comment about default event_idx
> include: riscv: Fix wrong include guard in riscv_pmu.h
> riscv: Make legacy counter enum match the HW numbering
> riscv: Enable perf counters user access only through perf
Presumably the test also needs patching:
https://git.kernel.org/pub/scm/linux/kernel/git/acme/linux.git/tree/tools/perf/tests/mmap-basic.c?h=perf-tools-next#n287
Thanks,
Ian
> Documentation/admin-guide/sysctl/kernel.rst | 23 +++-
> arch/riscv/include/asm/perf_event.h | 3 +
> arch/riscv/kernel/Makefile | 2 +-
> arch/riscv/kernel/perf_event.c | 65 +++++++++++
> drivers/perf/riscv_pmu.c | 42 ++++++++
> drivers/perf/riscv_pmu_legacy.c | 24 ++++-
> drivers/perf/riscv_pmu_sbi.c | 113 ++++++++++++++++++--
> include/linux/perf/riscv_pmu.h | 9 +-
> include/linux/perf_event.h | 3 +-
> tools/lib/perf/mmap.c | 65 +++++++++++
> 10 files changed, 332 insertions(+), 17 deletions(-)
> create mode 100644 arch/riscv/kernel/perf_event.c
>
> --
> 2.37.2
>
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