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Message-ID: <d53c10d6-6a9c-c941-a7ff-70d4b4172960@gmail.com>
Date: Thu, 13 Apr 2023 11:40:11 -0700
From: Florian Fainelli <f.fainelli@...il.com>
To: Jim Quinlan <jim2101024@...il.com>, linux-pci@...r.kernel.org,
Nicolas Saenz Julienne <nsaenz@...nel.org>,
Bjorn Helgaas <bhelgaas@...gle.com>,
Lorenzo Pieralisi <lorenzo.pieralisi@....com>,
Cyril Brulebois <kibi@...ian.org>,
Phil Elwell <phil@...pberrypi.com>,
bcm-kernel-feedback-list@...adcom.com, james.quinlan@...adcom.com
Cc: "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@...r.kernel.org>,
"moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE"
<linux-arm-kernel@...ts.infradead.org>,
open list <linux-kernel@...r.kernel.org>,
"moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE"
<linux-rpi-kernel@...ts.infradead.org>,
Rob Herring <robh@...nel.org>
Subject: Re: [PATCH v2 0/3] PCI: brcmstb: CLKREQ# accomodations of downstream
device
On 4/11/23 09:59, Jim Quinlan wrote:
> v2 -- Changed binding property 'brcm,completion-timeout-msec' to
> 'brcm,completion-timeout-us'. (StefanW for standard suffix).
> -- Warn when clamping timeout value, and include clamped
> region in message. Also add min and max in YAML. (StefanW)
> -- Qualify description of "brcm,completion-timeout-us" so that
> it refers to PCIe transactions. (StefanW)
> -- Remvove mention of Linux specifics in binding description. (StefanW)
> -- s/clkreq#/CLKREQ#/g (Bjorn)
> -- Refactor completion-timeout-us code to compare max and min to
> value given by the property (as opposed to the computed value).
>
> v1 -- The current driver assumes the downstream devices can
> provide CLKREQ# for ASPM. These commits accomodate devices
> w/ or w/o clkreq# and also handle L1SS-capable devices.
>
> -- The Raspian Linux folks have already been using a PCIe RC
> property "brcm,enable-l1ss". These commits use the same
> property, in a backward-compatible manner, and the implementaion
> adds more detail and also automatically identifies devices w/o
> a clkreq# signal, i.e. most devices plugged into an RPi CM4
> IO board.
>
> Jim Quinlan (3):
> PCI: brcmstb: CLKREQ# accomodations of downstream device
> PCI: brcmstb: Set PCIe transaction completion timeout
> blah blah
Tested-by: Florian Fainelli <f.fainelli@...il.com>
On a 7216 system test with:
01:00.0 Network controller: Intel Corporation Wireless 7260 (rev 73)
and on the CM4 I/O board with:
01:00.0 Network controller: Intel Corporation Wireless 7260 (rev 73)
01:00.0 Ethernet controller: Intel Corporation 82574L Gigabit Network
Connection
01:00.0 Network controller: Broadcom Inc. and subsidiaries BCM43224
802.11a/b/g/n (rev 01)
01:00.0 SATA controller: Marvell Technology Group Ltd. 88SE9125 PCIe
SATA 6.0 Gb/s controller (rev 11) (prog-if 01 [AHCI 1.0])
01:00.0 Ethernet controller: Broadcom Inc. and subsidiaries NetXtreme
BCM5751 Gigabit Ethernet PCI Express (rev 21)
01:00.0 PCI bridge: PLX Technology, Inc. PEX8112 x1 Lane PCI
Express-to-PCI Bridge (rev aa)
02:00.0 Multiport serial controller: Pepperl+Fuchs RocketPort EXPRESS
8-port w/Octa Cable
01:00.0 Ethernet controller: Qualcomm Atheros AR5008 Wireless Network
Adapter (rev 01)
01:00.0 Network controller: Broadcom Inc. and subsidiaries BCM4311
802.11a/b/g (rev 01)
01:00.0 Network controller: Broadcom Inc. and subsidiaries BCM4322
802.11a/b/g/n Wireless LAN Controller (rev 01)
01:00.0 Network controller: Broadcom Inc. and subsidiaries BCM43602
802.11ac Wireless LAN SoC (rev 01)
and finally with a 4 port switch:
-[0000:00]---00.0-[01-07]----00.0-[02-07]--+-01.0-[03]----00.0 Intel
Corporation 82574L Gigabit Network Connection
+-03.0-[04-05]----00.0-[05]----00.0 Pepperl+Fuchs RocketPort EXPRESS
8-port w/Octa Cable
+-05.0-[06]----00.0
Broadcom Inc. and subsidiaries NetXtreme BCM5751 Gigabit Ethernet PCI
Express
\-07.0-[07]----00.0 Intel
Corporation 82574L Gigabit Network Connection
And than I ran out of devices that I could plug, the others were x4, x8
or x16.
Most (all?) would previously fail, so definitively an improvement!
Thanks!
--
--
Florian
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