linux-kernel - Re: [PATCH net-next v1 2/2] net: dsa: microchip: Add partial ACL support for ksz9477 switches

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Message-ID: <20230413042936.GA12562@pengutronix.de>
Date:   Thu, 13 Apr 2023 06:29:36 +0200
From:   Oleksij Rempel <o.rempel@...gutronix.de>
To:     "David S. Miller" <davem@...emloft.net>,
        Andrew Lunn <andrew@...n.ch>,
        Eric Dumazet <edumazet@...gle.com>,
        Florian Fainelli <f.fainelli@...il.com>,
        Jakub Kicinski <kuba@...nel.org>,
        Paolo Abeni <pabeni@...hat.com>,
        Vladimir Oltean <olteanv@...il.com>,
        Woojung Huh <woojung.huh@...rochip.com>,
        Arun Ramadoss <arun.ramadoss@...rochip.com>
Cc:     kernel@...gutronix.de, linux-kernel@...r.kernel.org,
        netdev@...r.kernel.org, UNGLinuxDriver@...rochip.com
Subject: Re: [PATCH net-next v1 2/2] net: dsa: microchip: Add partial ACL
 support for ksz9477 switches

On Tue, Apr 11, 2023 at 07:24:55PM +0200, Oleksij Rempel wrote:

...

>  drivers/net/dsa/microchip/ksz9477_acl.c | 950 ++++++++++++++++++++++++

I'll better split tc-flower code and ACL code to separate files. This
chips support other engines which can be used for priority remaping. For
example DiffServ/DSCP

>  drivers/net/dsa/microchip/ksz_common.c  |  40 +
>  drivers/net/dsa/microchip/ksz_common.h  |   1 +
...

> +/**
> + * ksz9477_acl_port_enable - Enables ACL functionality on a given port.
> + * @dev: The ksz_device instance.
> + * @port: The port number on which to enable ACL functionality.
> + *
> + * This function enables ACL functionality on the specified port by configuring
> + * the appropriate control registers. It returns 0 if the operation is
> + * successful, or a negative error code if an error occurs.
> + */
> +static int ksz9477_acl_port_enable(struct ksz_device *dev, int port)
> +{
> +	int ret;
> +
> +	ret = ksz_prmw8(dev, port, P_PRIO_CTRL, 0, PORT_ACL_PRIO_ENABLE |
> +			PORT_OR_PRIO);

According to KSZ9477S 5.2.8.2 Port Priority Control Register
"To achieve the desired functionality, do not set more than one bit at a
time in this register.
...
Bit 6 - OR’ed Priority
...
Bit 2 - 802.1p Priority Classification
Bit 1 - Diffserv Priority Classification
Bit 0 - ACL Priority Classification
"
@Arun  what will happen if multiple engines are used for packet
prioritization? For example ACL || Diffserv || 802.1p... ?
If I see it correctly, it is possible but not recommended. Should I
prevent usage of multiple prio sources? 


> +	if (ret)
> +		return ret;
> +
> +	return ksz_pwrite8(dev, port, REG_PORT_MRI_AUTHEN_CTRL,
> +			   PORT_ACL_ENABLE |
> +			   FIELD_PREP(PORT_AUTHEN_MODE, PORT_AUTHEN_PASS));
> +}

Regards,
Oleksij
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