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Message-Id: <20230413132949.3487664-17-irogers@google.com>
Date: Thu, 13 Apr 2023 06:29:44 -0700
From: Ian Rogers <irogers@...gle.com>
To: Peter Zijlstra <peterz@...radead.org>,
Ingo Molnar <mingo@...hat.com>,
Arnaldo Carvalho de Melo <acme@...nel.org>,
Mark Rutland <mark.rutland@....com>,
Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
Jiri Olsa <jolsa@...nel.org>,
Namhyung Kim <namhyung@...nel.org>,
Zhengjun Xing <zhengjun.xing@...ux.intel.com>,
Kan Liang <kan.liang@...ux.intel.com>,
linux-perf-users@...r.kernel.org, linux-kernel@...r.kernel.org,
Edward Baker <edward.baker@...el.com>,
Perry Taylor <perry.taylor@...el.com>,
Caleb Biggers <caleb.biggers@...el.com>
Cc: Stephane Eranian <eranian@...gle.com>,
Ian Rogers <irogers@...gle.com>
Subject: [PATCH v3 16/21] perf vendor events intel: Fix uncore topics for knightslanding
Remove 'uncore-other' topic classification, move to cache, io and
memory.
Signed-off-by: Ian Rogers <irogers@...gle.com>
---
.../{uncore-other.json => uncore-cache.json} | 260 ------------------
.../arch/x86/knightslanding/uncore-io.json | 194 +++++++++++++
.../x86/knightslanding/uncore-memory.json | 68 +++++
3 files changed, 262 insertions(+), 260 deletions(-)
rename tools/perf/pmu-events/arch/x86/knightslanding/{uncore-other.json => uncore-cache.json} (91%)
create mode 100644 tools/perf/pmu-events/arch/x86/knightslanding/uncore-io.json
diff --git a/tools/perf/pmu-events/arch/x86/knightslanding/uncore-other.json b/tools/perf/pmu-events/arch/x86/knightslanding/uncore-cache.json
similarity index 91%
rename from tools/perf/pmu-events/arch/x86/knightslanding/uncore-other.json
rename to tools/perf/pmu-events/arch/x86/knightslanding/uncore-cache.json
index fc85e0c95318..1b8dcfa5461c 100644
--- a/tools/perf/pmu-events/arch/x86/knightslanding/uncore-other.json
+++ b/tools/perf/pmu-events/arch/x86/knightslanding/uncore-cache.json
@@ -55,74 +55,6 @@
"UMask": "0x24",
"Unit": "CHA"
},
- {
- "BriefDescription": "Counts the number of read requests and streaming stores that hit in MCDRAM cache and the data in MCDRAM is clean with respect to DDR. This event is only valid in cache and hybrid memory mode.",
- "EventCode": "0x02",
- "EventName": "UNC_E_EDC_ACCESS.HIT_CLEAN",
- "PerPkg": "1",
- "UMask": "0x1",
- "Unit": "EDC_UCLK"
- },
- {
- "BriefDescription": "Counts the number of read requests and streaming stores that hit in MCDRAM cache and the data in MCDRAM is dirty with respect to DDR. This event is only valid in cache and hybrid memory mode.",
- "EventCode": "0x02",
- "EventName": "UNC_E_EDC_ACCESS.HIT_DIRTY",
- "PerPkg": "1",
- "UMask": "0x2",
- "Unit": "EDC_UCLK"
- },
- {
- "BriefDescription": "Counts the number of read requests and streaming stores that miss in MCDRAM cache and the data evicted from the MCDRAM is clean with respect to DDR. This event is only valid in cache and hybrid memory mode.",
- "EventCode": "0x02",
- "EventName": "UNC_E_EDC_ACCESS.MISS_CLEAN",
- "PerPkg": "1",
- "UMask": "0x4",
- "Unit": "EDC_UCLK"
- },
- {
- "BriefDescription": "Counts the number of read requests and streaming stores that miss in MCDRAM cache and the data evicted from the MCDRAM is dirty with respect to DDR. This event is only valid in cache and hybrid memory mode.",
- "EventCode": "0x02",
- "EventName": "UNC_E_EDC_ACCESS.MISS_DIRTY",
- "PerPkg": "1",
- "UMask": "0x8",
- "Unit": "EDC_UCLK"
- },
- {
- "BriefDescription": "Number of EDC Hits or Misses. Miss I",
- "EventCode": "0x02",
- "EventName": "UNC_E_EDC_ACCESS.MISS_INVALID",
- "PerPkg": "1",
- "UMask": "0x10",
- "Unit": "EDC_UCLK"
- },
- {
- "BriefDescription": "ECLK count",
- "EventName": "UNC_E_E_CLOCKTICKS",
- "PerPkg": "1",
- "Unit": "EDC_ECLK"
- },
- {
- "BriefDescription": "Counts the number of read requests received by the MCDRAM controller. This event is valid in all three memory modes: flat, cache and hybrid. In cache and hybrid memory mode, this event counts all read requests as well as streaming stores that hit or miss in the MCDRAM cache.",
- "EventCode": "0x01",
- "EventName": "UNC_E_RPQ_INSERTS",
- "PerPkg": "1",
- "UMask": "0x1",
- "Unit": "EDC_ECLK"
- },
- {
- "BriefDescription": "UCLK count",
- "EventName": "UNC_E_U_CLOCKTICKS",
- "PerPkg": "1",
- "Unit": "EDC_UCLK"
- },
- {
- "BriefDescription": "Counts the number of write requests received by the MCDRAM controller. This event is valid in all three memory modes: flat, cache and hybrid. In cache and hybrid memory mode, this event counts all streaming stores, writebacks and, read requests that miss in MCDRAM cache.",
- "EventCode": "0x02",
- "EventName": "UNC_E_WPQ_INSERTS",
- "PerPkg": "1",
- "UMask": "0x1",
- "Unit": "EDC_ECLK"
- },
{
"BriefDescription": "CMS Agent0 AD Credits Acquired For Transgress 0",
"EventCode": "0x80",
@@ -3429,197 +3361,5 @@
"PerPkg": "1",
"UMask": "0x1",
"Unit": "CHA"
- },
- {
- "BriefDescription": "Egress (to CMS) Cycles Full. Counts the number of cycles when the M2PCIe Egress is full. AD_0",
- "EventCode": "0x25",
- "EventName": "UNC_M2P_EGRESS_CYCLES_FULL.AD_0",
- "PerPkg": "1",
- "UMask": "0x1",
- "Unit": "M2PCIe"
- },
- {
- "BriefDescription": "Egress (to CMS) Cycles Full. Counts the number of cycles when the M2PCIe Egress is full. AD_1",
- "EventCode": "0x25",
- "EventName": "UNC_M2P_EGRESS_CYCLES_FULL.AD_1",
- "PerPkg": "1",
- "UMask": "0x8",
- "Unit": "M2PCIe"
- },
- {
- "BriefDescription": "Egress (to CMS) Cycles Full. Counts the number of cycles when the M2PCIe Egress is full. AK_0",
- "EventCode": "0x25",
- "EventName": "UNC_M2P_EGRESS_CYCLES_FULL.AK_0",
- "PerPkg": "1",
- "UMask": "0x2",
- "Unit": "M2PCIe"
- },
- {
- "BriefDescription": "Egress (to CMS) Cycles Full. Counts the number of cycles when the M2PCIe Egress is full. AK_1",
- "EventCode": "0x25",
- "EventName": "UNC_M2P_EGRESS_CYCLES_FULL.AK_1",
- "PerPkg": "1",
- "UMask": "0x10",
- "Unit": "M2PCIe"
- },
- {
- "BriefDescription": "Egress (to CMS) Cycles Full. Counts the number of cycles when the M2PCIe Egress is full. BL_0",
- "EventCode": "0x25",
- "EventName": "UNC_M2P_EGRESS_CYCLES_FULL.BL_0",
- "PerPkg": "1",
- "UMask": "0x4",
- "Unit": "M2PCIe"
- },
- {
- "BriefDescription": "Egress (to CMS) Cycles Full. Counts the number of cycles when the M2PCIe Egress is full. BL_1",
- "EventCode": "0x25",
- "EventName": "UNC_M2P_EGRESS_CYCLES_FULL.BL_1",
- "PerPkg": "1",
- "UMask": "0x20",
- "Unit": "M2PCIe"
- },
- {
- "BriefDescription": "Egress (to CMS) Cycles Not Empty. Counts the number of cycles when the M2PCIe Egress is not empty. AD_0",
- "EventCode": "0x23",
- "EventName": "UNC_M2P_EGRESS_CYCLES_NE.AD_0",
- "PerPkg": "1",
- "UMask": "0x1",
- "Unit": "M2PCIe"
- },
- {
- "BriefDescription": "Egress (to CMS) Cycles Not Empty. Counts the number of cycles when the M2PCIe Egress is not empty. AD_1",
- "EventCode": "0x23",
- "EventName": "UNC_M2P_EGRESS_CYCLES_NE.AD_1",
- "PerPkg": "1",
- "UMask": "0x8",
- "Unit": "M2PCIe"
- },
- {
- "BriefDescription": "Egress (to CMS) Cycles Not Empty. Counts the number of cycles when the M2PCIe Egress is not empty. AK_0",
- "EventCode": "0x23",
- "EventName": "UNC_M2P_EGRESS_CYCLES_NE.AK_0",
- "PerPkg": "1",
- "UMask": "0x2",
- "Unit": "M2PCIe"
- },
- {
- "BriefDescription": "Egress (to CMS) Cycles Not Empty. Counts the number of cycles when the M2PCIe Egress is not empty. AK_1",
- "EventCode": "0x23",
- "EventName": "UNC_M2P_EGRESS_CYCLES_NE.AK_1",
- "PerPkg": "1",
- "UMask": "0x10",
- "Unit": "M2PCIe"
- },
- {
- "BriefDescription": "Egress (to CMS) Cycles Not Empty. Counts the number of cycles when the M2PCIe Egress is not empty. BL_0",
- "EventCode": "0x23",
- "EventName": "UNC_M2P_EGRESS_CYCLES_NE.BL_0",
- "PerPkg": "1",
- "UMask": "0x4",
- "Unit": "M2PCIe"
- },
- {
- "BriefDescription": "Egress (to CMS) Cycles Not Empty. Counts the number of cycles when the M2PCIe Egress is not empty. BL_1",
- "EventCode": "0x23",
- "EventName": "UNC_M2P_EGRESS_CYCLES_NE.BL_1",
- "PerPkg": "1",
- "UMask": "0x20",
- "Unit": "M2PCIe"
- },
- {
- "BriefDescription": "Egress (to CMS) Ingress. Counts the number of number of messages inserted into the the M2PCIe Egress queue. AD_0",
- "EventCode": "0x24",
- "EventName": "UNC_M2P_EGRESS_INSERTS.AD_0",
- "PerPkg": "1",
- "UMask": "0x1",
- "Unit": "M2PCIe"
- },
- {
- "BriefDescription": "Egress (to CMS) Ingress. Counts the number of number of messages inserted into the the M2PCIe Egress queue. AD_1",
- "EventCode": "0x24",
- "EventName": "UNC_M2P_EGRESS_INSERTS.AD_1",
- "PerPkg": "1",
- "UMask": "0x10",
- "Unit": "M2PCIe"
- },
- {
- "BriefDescription": "Egress (to CMS) Ingress. Counts the number of number of messages inserted into the the M2PCIe Egress queue. AK_0",
- "EventCode": "0x24",
- "EventName": "UNC_M2P_EGRESS_INSERTS.AK_0",
- "PerPkg": "1",
- "UMask": "0x2",
- "Unit": "M2PCIe"
- },
- {
- "BriefDescription": "Egress (to CMS) Ingress. Counts the number of number of messages inserted into the the M2PCIe Egress queue. AK_1",
- "EventCode": "0x24",
- "EventName": "UNC_M2P_EGRESS_INSERTS.AK_1",
- "PerPkg": "1",
- "UMask": "0x20",
- "Unit": "M2PCIe"
- },
- {
- "BriefDescription": "Egress (to CMS) Ingress. Counts the number of number of messages inserted into the the M2PCIe Egress queue. AK_CRD_0",
- "EventCode": "0x24",
- "EventName": "UNC_M2P_EGRESS_INSERTS.AK_CRD_0",
- "PerPkg": "1",
- "UMask": "0x8",
- "Unit": "M2PCIe"
- },
- {
- "BriefDescription": "Egress (to CMS) Ingress. Counts the number of number of messages inserted into the the M2PCIe Egress queue. AK_CRD_1",
- "EventCode": "0x24",
- "EventName": "UNC_M2P_EGRESS_INSERTS.AK_CRD_1",
- "PerPkg": "1",
- "UMask": "0x80",
- "Unit": "M2PCIe"
- },
- {
- "BriefDescription": "Egress (to CMS) Ingress. Counts the number of number of messages inserted into the the M2PCIe Egress queue. BL_0",
- "EventCode": "0x24",
- "EventName": "UNC_M2P_EGRESS_INSERTS.BL_0",
- "PerPkg": "1",
- "UMask": "0x4",
- "Unit": "M2PCIe"
- },
- {
- "BriefDescription": "Egress (to CMS) Ingress. Counts the number of number of messages inserted into the the M2PCIe Egress queue. BL_1",
- "EventCode": "0x24",
- "EventName": "UNC_M2P_EGRESS_INSERTS.BL_1",
- "PerPkg": "1",
- "UMask": "0x40",
- "Unit": "M2PCIe"
- },
- {
- "BriefDescription": "Ingress Queue Cycles Not Empty. Counts the number of cycles when the M2PCIe Ingress is not empty.ALL",
- "EventCode": "0x10",
- "EventName": "UNC_M2P_INGRESS_CYCLES_NE.ALL",
- "PerPkg": "1",
- "UMask": "0x80",
- "Unit": "M2PCIe"
- },
- {
- "BriefDescription": "Ingress Queue Cycles Not Empty. Counts the number of cycles when the M2PCIe Ingress is not empty.CBO_IDI",
- "EventCode": "0x10",
- "EventName": "UNC_M2P_INGRESS_CYCLES_NE.CBO_IDI",
- "PerPkg": "1",
- "UMask": "0x1",
- "Unit": "M2PCIe"
- },
- {
- "BriefDescription": "Ingress Queue Cycles Not Empty. Counts the number of cycles when the M2PCIe Ingress is not empty.CBO_NCB",
- "EventCode": "0x10",
- "EventName": "UNC_M2P_INGRESS_CYCLES_NE.CBO_NCB",
- "PerPkg": "1",
- "UMask": "0x2",
- "Unit": "M2PCIe"
- },
- {
- "BriefDescription": "Ingress Queue Cycles Not Empty. Counts the number of cycles when the M2PCIe Ingress is not empty.CBO_NCS",
- "EventCode": "0x10",
- "EventName": "UNC_M2P_INGRESS_CYCLES_NE.CBO_NCS",
- "PerPkg": "1",
- "UMask": "0x4",
- "Unit": "M2PCIe"
}
]
diff --git a/tools/perf/pmu-events/arch/x86/knightslanding/uncore-io.json b/tools/perf/pmu-events/arch/x86/knightslanding/uncore-io.json
new file mode 100644
index 000000000000..898f7e425cd4
--- /dev/null
+++ b/tools/perf/pmu-events/arch/x86/knightslanding/uncore-io.json
@@ -0,0 +1,194 @@
+[
+ {
+ "BriefDescription": "Egress (to CMS) Cycles Full. Counts the number of cycles when the M2PCIe Egress is full. AD_0",
+ "EventCode": "0x25",
+ "EventName": "UNC_M2P_EGRESS_CYCLES_FULL.AD_0",
+ "PerPkg": "1",
+ "UMask": "0x1",
+ "Unit": "M2PCIe"
+ },
+ {
+ "BriefDescription": "Egress (to CMS) Cycles Full. Counts the number of cycles when the M2PCIe Egress is full. AD_1",
+ "EventCode": "0x25",
+ "EventName": "UNC_M2P_EGRESS_CYCLES_FULL.AD_1",
+ "PerPkg": "1",
+ "UMask": "0x8",
+ "Unit": "M2PCIe"
+ },
+ {
+ "BriefDescription": "Egress (to CMS) Cycles Full. Counts the number of cycles when the M2PCIe Egress is full. AK_0",
+ "EventCode": "0x25",
+ "EventName": "UNC_M2P_EGRESS_CYCLES_FULL.AK_0",
+ "PerPkg": "1",
+ "UMask": "0x2",
+ "Unit": "M2PCIe"
+ },
+ {
+ "BriefDescription": "Egress (to CMS) Cycles Full. Counts the number of cycles when the M2PCIe Egress is full. AK_1",
+ "EventCode": "0x25",
+ "EventName": "UNC_M2P_EGRESS_CYCLES_FULL.AK_1",
+ "PerPkg": "1",
+ "UMask": "0x10",
+ "Unit": "M2PCIe"
+ },
+ {
+ "BriefDescription": "Egress (to CMS) Cycles Full. Counts the number of cycles when the M2PCIe Egress is full. BL_0",
+ "EventCode": "0x25",
+ "EventName": "UNC_M2P_EGRESS_CYCLES_FULL.BL_0",
+ "PerPkg": "1",
+ "UMask": "0x4",
+ "Unit": "M2PCIe"
+ },
+ {
+ "BriefDescription": "Egress (to CMS) Cycles Full. Counts the number of cycles when the M2PCIe Egress is full. BL_1",
+ "EventCode": "0x25",
+ "EventName": "UNC_M2P_EGRESS_CYCLES_FULL.BL_1",
+ "PerPkg": "1",
+ "UMask": "0x20",
+ "Unit": "M2PCIe"
+ },
+ {
+ "BriefDescription": "Egress (to CMS) Cycles Not Empty. Counts the number of cycles when the M2PCIe Egress is not empty. AD_0",
+ "EventCode": "0x23",
+ "EventName": "UNC_M2P_EGRESS_CYCLES_NE.AD_0",
+ "PerPkg": "1",
+ "UMask": "0x1",
+ "Unit": "M2PCIe"
+ },
+ {
+ "BriefDescription": "Egress (to CMS) Cycles Not Empty. Counts the number of cycles when the M2PCIe Egress is not empty. AD_1",
+ "EventCode": "0x23",
+ "EventName": "UNC_M2P_EGRESS_CYCLES_NE.AD_1",
+ "PerPkg": "1",
+ "UMask": "0x8",
+ "Unit": "M2PCIe"
+ },
+ {
+ "BriefDescription": "Egress (to CMS) Cycles Not Empty. Counts the number of cycles when the M2PCIe Egress is not empty. AK_0",
+ "EventCode": "0x23",
+ "EventName": "UNC_M2P_EGRESS_CYCLES_NE.AK_0",
+ "PerPkg": "1",
+ "UMask": "0x2",
+ "Unit": "M2PCIe"
+ },
+ {
+ "BriefDescription": "Egress (to CMS) Cycles Not Empty. Counts the number of cycles when the M2PCIe Egress is not empty. AK_1",
+ "EventCode": "0x23",
+ "EventName": "UNC_M2P_EGRESS_CYCLES_NE.AK_1",
+ "PerPkg": "1",
+ "UMask": "0x10",
+ "Unit": "M2PCIe"
+ },
+ {
+ "BriefDescription": "Egress (to CMS) Cycles Not Empty. Counts the number of cycles when the M2PCIe Egress is not empty. BL_0",
+ "EventCode": "0x23",
+ "EventName": "UNC_M2P_EGRESS_CYCLES_NE.BL_0",
+ "PerPkg": "1",
+ "UMask": "0x4",
+ "Unit": "M2PCIe"
+ },
+ {
+ "BriefDescription": "Egress (to CMS) Cycles Not Empty. Counts the number of cycles when the M2PCIe Egress is not empty. BL_1",
+ "EventCode": "0x23",
+ "EventName": "UNC_M2P_EGRESS_CYCLES_NE.BL_1",
+ "PerPkg": "1",
+ "UMask": "0x20",
+ "Unit": "M2PCIe"
+ },
+ {
+ "BriefDescription": "Egress (to CMS) Ingress. Counts the number of number of messages inserted into the the M2PCIe Egress queue. AD_0",
+ "EventCode": "0x24",
+ "EventName": "UNC_M2P_EGRESS_INSERTS.AD_0",
+ "PerPkg": "1",
+ "UMask": "0x1",
+ "Unit": "M2PCIe"
+ },
+ {
+ "BriefDescription": "Egress (to CMS) Ingress. Counts the number of number of messages inserted into the the M2PCIe Egress queue. AD_1",
+ "EventCode": "0x24",
+ "EventName": "UNC_M2P_EGRESS_INSERTS.AD_1",
+ "PerPkg": "1",
+ "UMask": "0x10",
+ "Unit": "M2PCIe"
+ },
+ {
+ "BriefDescription": "Egress (to CMS) Ingress. Counts the number of number of messages inserted into the the M2PCIe Egress queue. AK_0",
+ "EventCode": "0x24",
+ "EventName": "UNC_M2P_EGRESS_INSERTS.AK_0",
+ "PerPkg": "1",
+ "UMask": "0x2",
+ "Unit": "M2PCIe"
+ },
+ {
+ "BriefDescription": "Egress (to CMS) Ingress. Counts the number of number of messages inserted into the the M2PCIe Egress queue. AK_1",
+ "EventCode": "0x24",
+ "EventName": "UNC_M2P_EGRESS_INSERTS.AK_1",
+ "PerPkg": "1",
+ "UMask": "0x20",
+ "Unit": "M2PCIe"
+ },
+ {
+ "BriefDescription": "Egress (to CMS) Ingress. Counts the number of number of messages inserted into the the M2PCIe Egress queue. AK_CRD_0",
+ "EventCode": "0x24",
+ "EventName": "UNC_M2P_EGRESS_INSERTS.AK_CRD_0",
+ "PerPkg": "1",
+ "UMask": "0x8",
+ "Unit": "M2PCIe"
+ },
+ {
+ "BriefDescription": "Egress (to CMS) Ingress. Counts the number of number of messages inserted into the the M2PCIe Egress queue. AK_CRD_1",
+ "EventCode": "0x24",
+ "EventName": "UNC_M2P_EGRESS_INSERTS.AK_CRD_1",
+ "PerPkg": "1",
+ "UMask": "0x80",
+ "Unit": "M2PCIe"
+ },
+ {
+ "BriefDescription": "Egress (to CMS) Ingress. Counts the number of number of messages inserted into the the M2PCIe Egress queue. BL_0",
+ "EventCode": "0x24",
+ "EventName": "UNC_M2P_EGRESS_INSERTS.BL_0",
+ "PerPkg": "1",
+ "UMask": "0x4",
+ "Unit": "M2PCIe"
+ },
+ {
+ "BriefDescription": "Egress (to CMS) Ingress. Counts the number of number of messages inserted into the the M2PCIe Egress queue. BL_1",
+ "EventCode": "0x24",
+ "EventName": "UNC_M2P_EGRESS_INSERTS.BL_1",
+ "PerPkg": "1",
+ "UMask": "0x40",
+ "Unit": "M2PCIe"
+ },
+ {
+ "BriefDescription": "Ingress Queue Cycles Not Empty. Counts the number of cycles when the M2PCIe Ingress is not empty.ALL",
+ "EventCode": "0x10",
+ "EventName": "UNC_M2P_INGRESS_CYCLES_NE.ALL",
+ "PerPkg": "1",
+ "UMask": "0x80",
+ "Unit": "M2PCIe"
+ },
+ {
+ "BriefDescription": "Ingress Queue Cycles Not Empty. Counts the number of cycles when the M2PCIe Ingress is not empty.CBO_IDI",
+ "EventCode": "0x10",
+ "EventName": "UNC_M2P_INGRESS_CYCLES_NE.CBO_IDI",
+ "PerPkg": "1",
+ "UMask": "0x1",
+ "Unit": "M2PCIe"
+ },
+ {
+ "BriefDescription": "Ingress Queue Cycles Not Empty. Counts the number of cycles when the M2PCIe Ingress is not empty.CBO_NCB",
+ "EventCode": "0x10",
+ "EventName": "UNC_M2P_INGRESS_CYCLES_NE.CBO_NCB",
+ "PerPkg": "1",
+ "UMask": "0x2",
+ "Unit": "M2PCIe"
+ },
+ {
+ "BriefDescription": "Ingress Queue Cycles Not Empty. Counts the number of cycles when the M2PCIe Ingress is not empty.CBO_NCS",
+ "EventCode": "0x10",
+ "EventName": "UNC_M2P_INGRESS_CYCLES_NE.CBO_NCS",
+ "PerPkg": "1",
+ "UMask": "0x4",
+ "Unit": "M2PCIe"
+ }
+]
diff --git a/tools/perf/pmu-events/arch/x86/knightslanding/uncore-memory.json b/tools/perf/pmu-events/arch/x86/knightslanding/uncore-memory.json
index 47da947b1a6e..fb752974179b 100644
--- a/tools/perf/pmu-events/arch/x86/knightslanding/uncore-memory.json
+++ b/tools/perf/pmu-events/arch/x86/knightslanding/uncore-memory.json
@@ -1,4 +1,72 @@
[
+ {
+ "BriefDescription": "Counts the number of read requests and streaming stores that hit in MCDRAM cache and the data in MCDRAM is clean with respect to DDR. This event is only valid in cache and hybrid memory mode.",
+ "EventCode": "0x02",
+ "EventName": "UNC_E_EDC_ACCESS.HIT_CLEAN",
+ "PerPkg": "1",
+ "UMask": "0x1",
+ "Unit": "EDC_UCLK"
+ },
+ {
+ "BriefDescription": "Counts the number of read requests and streaming stores that hit in MCDRAM cache and the data in MCDRAM is dirty with respect to DDR. This event is only valid in cache and hybrid memory mode.",
+ "EventCode": "0x02",
+ "EventName": "UNC_E_EDC_ACCESS.HIT_DIRTY",
+ "PerPkg": "1",
+ "UMask": "0x2",
+ "Unit": "EDC_UCLK"
+ },
+ {
+ "BriefDescription": "Counts the number of read requests and streaming stores that miss in MCDRAM cache and the data evicted from the MCDRAM is clean with respect to DDR. This event is only valid in cache and hybrid memory mode.",
+ "EventCode": "0x02",
+ "EventName": "UNC_E_EDC_ACCESS.MISS_CLEAN",
+ "PerPkg": "1",
+ "UMask": "0x4",
+ "Unit": "EDC_UCLK"
+ },
+ {
+ "BriefDescription": "Counts the number of read requests and streaming stores that miss in MCDRAM cache and the data evicted from the MCDRAM is dirty with respect to DDR. This event is only valid in cache and hybrid memory mode.",
+ "EventCode": "0x02",
+ "EventName": "UNC_E_EDC_ACCESS.MISS_DIRTY",
+ "PerPkg": "1",
+ "UMask": "0x8",
+ "Unit": "EDC_UCLK"
+ },
+ {
+ "BriefDescription": "Number of EDC Hits or Misses. Miss I",
+ "EventCode": "0x02",
+ "EventName": "UNC_E_EDC_ACCESS.MISS_INVALID",
+ "PerPkg": "1",
+ "UMask": "0x10",
+ "Unit": "EDC_UCLK"
+ },
+ {
+ "BriefDescription": "ECLK count",
+ "EventName": "UNC_E_E_CLOCKTICKS",
+ "PerPkg": "1",
+ "Unit": "EDC_ECLK"
+ },
+ {
+ "BriefDescription": "Counts the number of read requests received by the MCDRAM controller. This event is valid in all three memory modes: flat, cache and hybrid. In cache and hybrid memory mode, this event counts all read requests as well as streaming stores that hit or miss in the MCDRAM cache.",
+ "EventCode": "0x01",
+ "EventName": "UNC_E_RPQ_INSERTS",
+ "PerPkg": "1",
+ "UMask": "0x1",
+ "Unit": "EDC_ECLK"
+ },
+ {
+ "BriefDescription": "UCLK count",
+ "EventName": "UNC_E_U_CLOCKTICKS",
+ "PerPkg": "1",
+ "Unit": "EDC_UCLK"
+ },
+ {
+ "BriefDescription": "Counts the number of write requests received by the MCDRAM controller. This event is valid in all three memory modes: flat, cache and hybrid. In cache and hybrid memory mode, this event counts all streaming stores, writebacks and, read requests that miss in MCDRAM cache.",
+ "EventCode": "0x02",
+ "EventName": "UNC_E_WPQ_INSERTS",
+ "PerPkg": "1",
+ "UMask": "0x1",
+ "Unit": "EDC_ECLK"
+ },
{
"BriefDescription": "CAS All",
"EventCode": "0x03",
--
2.40.0.577.gac1e443424-goog
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