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Date: Fri, 14 Apr 2023 23:08:02 +0200
From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To: David Yang <mmyangfl@...il.com>, linux-clk@...r.kernel.org
Cc: Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 1/2] dt-bindings: clock: Add reg-clock-controller
On 14/04/2023 20:12, David Yang wrote:
> Add DT bindings documentation for reg-clock-controller, collection of
> basic clocks common to many platforms.
>
> Signed-off-by: David Yang <mmyangfl@...il.com>
> ---
> .../bindings/clock/reg-clock-controller.yaml | 245 ++++++++++++++++++
> 1 file changed, 245 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/clock/reg-clock-controller.yaml
>
> diff --git a/Documentation/devicetree/bindings/clock/reg-clock-controller.yaml b/Documentation/devicetree/bindings/clock/reg-clock-controller.yaml
> new file mode 100644
> index 000000000000..a6a7e0b05821
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/reg-clock-controller.yaml
> @@ -0,0 +1,245 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/clock/reg-clock-controller.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Simple straight-forward register-based clocks
> +
> +maintainers:
> + - David Yang <mmyangfl@...il.com>
> +
> +description: |
> + Basic clocks common to many platforms.
> +
> + If your clocks don't fit into these catagories, simply create your clock
typo: categories
> + controller. This driver normally work well with other controllers as long as
> + they operate on different registers.
> +
> + See linux/clk-provider.h for details about properties for each type of clock.
Describe here what is this device, what such simple clock controller
represents.
> +
> +properties:
> + compatible:
> + enum:
> + - reg-clock-controller
> +
> + ranges: true
> +
> + '#address-cells':
> + const: 1
> +
> + '#size-cells':
> + const: 1
> +
> +required:
> + - compatible
> + - ranges
> + - '#address-cells'
> + - '#size-cells'
required goes after patternProperties.
> +
> +patternProperties:
> + ".*gate-clock@.*":
"gate-clock@" should be equivalent. However this should be just "clock".
> + type: object
> +
> + description: |
Do not need '|' unless you need to preserve formatting.
> + Clock which can gate its output.
> +
> + properties:
> + compatible:
> + const: gate-clock
> +
> + reg:
> + maxItems: 1
> +
> + '#clock-cells':
> + const: 0
> +
> + clocks:
> + maxItems: 1
> + description:
> + Parent clock.
> +
> + clock-output-name:
names
Don't create your own properties.
> + maxItems: 1
> +
> + bit-index:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + description:
> + Bit index which controls the output.
I suggest to use same property as nvme, so bits.
> +
> + required:
> + - compatible
> + - reg
> + - '#clock-cells'
> + - bit-index
> +
> + additionalProperties: false
> +
> + ".*divider-clock@.*":
> + type: object
> +
> + description: |
> + Clock with an adjustable divider affecting its output frequency.
> +
> + properties:
> + compatible:
> + const: divider-clock
> +
> + reg:
> + maxItems: 1
> +
> + '#clock-cells':
> + const: 0
> +
> + clocks:
> + description:
> + Parent clocks.
> +
> + clock-output-name:
> + maxItems: 1
> +
> + shift:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + description:
> + Shift to the divider bit field.
> +
> + width:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + description:
> + Width of the divider bit field.
> +
> + dividers:
> + $ref: /schemas/types.yaml#/definitions/uint32-array
> + description:
> + Array of value/divider pairs.
Then it looks like matrix.
> +
> + required:
> + - compatible
> + - reg
> + - '#clock-cells'
> + - shift
> + - width
> +
> + additionalProperties: false
> +
> + ".*mux-clock@.*":
> + type: object
> +
> + description: |
> + Clock with multiple selectable parents.
> +
> + properties:
> + compatible:
> + const: mux-clock
> +
> + reg:
> + maxItems: 1
> +
> + '#clock-cells':
> + const: 0
> +
> + clocks:
> + minItems: 1
> + description:
> + Parent clock.
> +
> + clock-output-name:
> + maxItems: 1
> +
> + shift:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + description:
> + Shift to multiplexer bit field.
> +
> + mask:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + description:
> + Mask of mutliplexer bit field.
> +
> + table:
> + $ref: /schemas/types.yaml#/definitions/uint32-array
> + description:
> + Array of register values corresponding to the parent index.
> +
> + required:
> + - compatible
> + - reg
> + - '#clock-cells'
> + - shift
> + - mask
> +
> + additionalProperties: false
> +
> + ".*fractional-divider-clock@.*":
> + type: object
> +
> + description: |
> + Clock with adjustable fractional divider affecting its output frequency.
> +
> + properties:
> + compatible:
> + const: fractional_divider-clock
> +
> + reg:
> + maxItems: 1
> +
> + '#clock-cells':
> + const: 0
> +
> + clocks:
> + maxItems: 1
> + description:
> + Parent clock.
> +
> + clock-output-name:
> + maxItems: 1
> +
> + numerator-shift:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + description:
> + Shift to the numerator bit field.
> +
> + numerator-width:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + description:
> + Width of the numerator bit field.
> +
> + denominator-shift:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + description:
> + Shift to the denominator bit field.
> +
> + denominator-width:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + description:
> + Width of the denominator bit field.
> +
> + required:
> + - compatible
> + - reg
> + - '#clock-cells'
> + - numerator-shift
> + - numerator-width
> + - denominator-shift
> + - denominator-width
> +
> + additionalProperties: false
> +
> +additionalProperties: true
No, come on. This must be false.
> +
> +examples:
> + - |
> + clks: reg-clk-ctrl@...f0000 {
Names should be generic, so clock-controller
Drop the label.
> + compatible = "reg-clock-controller";
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges = <0 0xffff0000 0x1000>;
> +
> + my_clk: gate-clock@...3 {
Drop label.
That's a new unit address to me. Did I miss a change in DT spec?
> + compatible = "gate-clock";
> + #clock-cells = <0>;
> + reg = <0xcc 4>;
reg is after compatible.
> + bit-index = <3>;
> + clock-output-name = "my-clk";
Plus, test your patches. This fails testing...
> + };
> + };
Best regards,
Krzysztof
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