[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-Id: <20230414112843.1358067-5-eblanc@baylibre.com>
Date: Fri, 14 Apr 2023 13:28:42 +0200
From: Esteban Blanc <eblanc@...libre.com>
To: nm@...com, vigneshr@...com, kristo@...nel.org, robh+dt@...nel.org,
krzysztof.kozlowski+dt@...aro.org
Cc: linux-arm-kernel@...ts.infradead.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, sterzik@...com, u-kumar1@...com,
eblanc@...libre.com, jneanne@...libre.com, jpanis@...libre.com,
aseketeli@...libre.com
Subject: [PATCH v2 4/5] arm64: dts: ti: k3-j784s4-evm: Add support for TPS6593 PMIC
From: Jerome Neanne <jneanne@...libre.com>
This patch adds support for TPS65933A PMIC on wkup I2C0 bus.
This device provides regulators (bucks and LDOs), but also
GPIOs, a RTC, a watchdog, an ESM (Error Signal Monitor)
which monitors the SoC error output signal, and a PFSM
(Pre-configurable Finite State Machine) which manages the
operational modes of the PMIC.
Signed-off-by: Jerome Neanne <jneanne@...libre.com>
Signed-off-by: Esteban Blanc <eblanc@...libre.com>
---
arch/arm64/boot/dts/ti/k3-j784s4-evm.dts | 116 +++++++++++++++++++++++
1 file changed, 116 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts b/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts
index 8cd4a7ecc121..339fc40f6466 100644
--- a/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts
+++ b/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts
@@ -103,6 +103,122 @@ vdd_sd_dv: regulator-TLV71033 {
};
};
+&wkup_pmx0 {
+ status = "okay";
+ wkup_i2c0_pins_default: wkup_i2c0_pins_default {
+ pinctrl-single,pins = <
+ J784S4_WKUP_IOPAD(0x100, PIN_INPUT, 0) /* (N33) WKUP_I2C0_SCL */
+ J784S4_WKUP_IOPAD(0x104, PIN_INPUT, 0) /* (N35) WKUP_I2C0_SDA */
+ >;
+ };
+
+ pmic_irq_pins_default: pmic-irq-pins-default {
+ pinctrl-single,pins = <
+ /* (G33) MCU_OSPI1_CSn1.WKUP_GPIO0_39 */
+ J784S4_WKUP_IOPAD(0x060, PIN_INPUT, 7)
+ >;
+ };
+};
+
+&wkup_gpio0 {
+ status = "okay";
+};
+
+&wkup_i2c0 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&wkup_i2c0_pins_default>;
+ clock-frequency = <400000>;
+ tps659413: tps659413@48 {
+ compatible = "ti,tps6594-q1";
+ reg = <0x48>;
+ system-power-controller;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pmic_irq_pins_default>;
+ interrupt-parent = <&wkup_gpio0>;
+ interrupts = <39 IRQ_TYPE_EDGE_FALLING>;
+ ti,primary-pmic;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ buck12-supply = <&vsys_3v3>;
+ buck3-supply = <&vsys_3v3>;
+ buck4-supply = <&vsys_3v3>;
+ buck5-supply = <&vsys_3v3>;
+ ldo1-supply = <&vsys_3v3>;
+ ldo2-supply = <&vsys_3v3>;
+ ldo3-supply = <&vsys_3v3>;
+ ldo4-supply = <&vsys_3v3>;
+
+ regulators {
+ bucka12: buck12 {
+ regulator-name = "vdd_ddr_1v1";
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1100000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ bucka3: buck3 {
+ regulator-name = "vdd_ram_0v85";
+ regulator-min-microvolt = <850000>;
+ regulator-max-microvolt = <850000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ bucka4: buck4 {
+ regulator-name = "vdd_io_1v8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ bucka5: buck5 {
+ regulator-name = "vdd_mcu_0v85";
+ regulator-min-microvolt = <850000>;
+ regulator-max-microvolt = <850000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ ldoa1: ldo1 {
+ regulator-name = "vdd_mcuio_1v8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ ldoa2: ldo2 {
+ regulator-name = "vdd_mcuio_3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ ldoa3: ldo3 {
+ regulator-name = "vds_dll_0v8";
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <800000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ ldoa4: ldo4 {
+ regulator-name = "vda_mcu_1v8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+ };
+ };
+};
+
&main_pmx0 {
main_uart8_pins_default: main-uart8-pins-default {
pinctrl-single,pins = <
--
2.39.2
Powered by blists - more mailing lists