linux-kernel - Re: [PATCH v2] KVM: x86: Fix poll command

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-Id: <20230415033012.3826437-1-alexjlzheng@tencent.com>
Date:   Sat, 15 Apr 2023 11:30:12 +0800
From:   alexjlzheng@...il.com
To:     seanjc@...gle.com
Cc:     alexjlzheng@...il.com, alexjlzheng@...cent.com, bp@...en8.de,
        dave.hansen@...ux.intel.com, hpa@...or.com, kvm@...r.kernel.org,
        linux-kernel@...r.kernel.org, mingo@...hat.com,
        pbonzini@...hat.com, tglx@...utronix.de, x86@...nel.org
Subject: Re: [PATCH v2] KVM: x86: Fix poll command

On Fri, 14 Apr 2023, Sean Christopherson <seanjc@...gle.com> wrote:
> On Thu, Apr 13, 2023, alexjlzheng@...il.com wrote:
> > From: Jinliang Zheng <alexjlzheng@...cent.com>
> > 
> > According to the hardware manual, when the Poll command is issued, the
> 
> Please add "8259", i.e. "According to the 8259 hardware manual".

Ok, I will pay attention next time.

> 
> > byte returned by the I/O read is 1 in Bit 7 when there is an interrupt,
> > and the highest priority binary code in Bits 2:0. The current pic
> > simulation code is not implemented strictly according to the above
> > expression.
> > 
> > Fix the implementation of pic_poll_read():
> > 1. Set Bit 7 when there is an interrupt
> > 2. Return 0 when there is no interrupt
> 
> I don't think #2 is justified.  The spec says:
> 
>   The interrupt requests are ordered in priority from 0 through 7 (0 highest).

This is only true when don't use rotation for priority or just reset the 8259a.
It's prossible to change priorities, i.e. Specific Rotation Mode or Automatic
Rotation Mode.

> 
> I.e. the current code enumerates the _lowest_ priority when there is no interrupt,
> which seems more correct than reporting the highest priority possible.

The practice and interpretation of returning to the lowest priority interrupt
when there are no active interrupts in the PIC doesn't seem reasonable, as far as I
understand. For #2, in my opinion, the correct interpretation of the current code
may be that a spurious interrupt is returned(IRQ 7 is used for that according to
the 8259 hardware manual).

For #2, the main purpose of returning 0 is to set Bit 7 of the return value to 0
to indicate that there is no interrupt.

Thank you very much.
Jinliang Zheng