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Message-ID: <5b6d4cfd-dedb-3123-9db4-28e202da11b2@denx.de>
Date: Mon, 17 Apr 2023 00:12:29 +0200
From: Marek Vasut <marex@...x.de>
To: Adam Ford <aford173@...il.com>, dri-devel@...ts.freedesktop.org
Cc: m.szyprowski@...sung.com, aford@...conembedded.com,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Shawn Guo <shawnguo@...nel.org>,
Sascha Hauer <s.hauer@...gutronix.de>,
Pengutronix Kernel Team <kernel@...gutronix.de>,
Fabio Estevam <festevam@...il.com>,
NXP Linux Team <linux-imx@....com>,
Inki Dae <inki.dae@...sung.com>,
Jagan Teki <jagan@...rulasolutions.com>,
Andrzej Hajda <andrzej.hajda@...el.com>,
Neil Armstrong <neil.armstrong@...aro.org>,
Robert Foss <rfoss@...nel.org>,
Laurent Pinchart <Laurent.pinchart@...asonboard.com>,
Jonas Karlman <jonas@...boo.se>,
Jernej Skrabec <jernej.skrabec@...il.com>,
David Airlie <airlied@...il.com>,
Daniel Vetter <daniel@...ll.ch>,
Frieder Schrempf <frieder.schrempf@...tron.de>,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH 4/6] drm: bridge: samsung-dsim: Dynamically configure DPHY
timing
On 4/15/23 12:41, Adam Ford wrote:
> NXP uses a lookup table to determine the various values for
> the PHY Timing based on the clock rate in their downstream
> kernel. Since the input clock can be variable, the phy
> settings need to be variable too. Add an additional variable
> to the driver data to enable this feature to prevent breaking
> boards that don't support it.
Isn't there already a generic LP2HS transition time calculation in the
kernel ?
This looks like a generic calculation which should be done by all the
DSI hosts, so why not introduce a generic helper to do such a
calculation (and not a table please) ?
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