linux-kernel - [PATCH v1 3/4] arm64: dts: colibri-imx8x: fix iris pinctrl configuration

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Message-Id: <20230417173830.19401-4-andrejs.cainikovs@toradex.com>
Date:   Mon, 17 Apr 2023 19:38:29 +0200
From:   Andrejs Cainikovs <andrejs.cainikovs@...il.com>
To:     linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        devicetree@...r.kernel.org
Cc:     Pengutronix Kernel Team <kernel@...gutronix.de>,
        Fabio Estevam <festevam@...il.com>,
        NXP Linux Team <linux-imx@....com>,
        Shawn Guo <shawnguo@...nel.org>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Sascha Hauer <s.hauer@...gutronix.de>,
        Marcel Ziswiler <marcel.ziswiler@...adex.com>,
        Emanuele Ghidoli <emanuele.ghidoli@...adex.com>,
        Francesco Dolcini <francesco.dolcini@...adex.com>,
        Andrejs Cainikovs <andrejs.cainikovs@...adex.com>
Subject: [PATCH v1 3/4] arm64: dts: colibri-imx8x: fix iris pinctrl configuration

From: Emanuele Ghidoli <emanuele.ghidoli@...adex.com>

Remove GPIO3_IO10 from Iris carrier board pinctrl configuration,
this is already defined in the SOM dtsi since this is a
standard SOM functionality (wake-up button).

Duplicating it leads to the following error message
imx8qxp-pinctrl scu:pinctrl: pin IMX8QXP_QSPI0A_DATA1 already requested

Fixes: aefb5e2d974d ("arm64: dts: colibri-imx8x: Add iris carrier board")

Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@...adex.com>
Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@...adex.com>
---
 arch/arm64/boot/dts/freescale/imx8x-colibri-iris.dtsi | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/freescale/imx8x-colibri-iris.dtsi b/arch/arm64/boot/dts/freescale/imx8x-colibri-iris.dtsi
index 5f30c88855e7..f8953067bc3b 100644
--- a/arch/arm64/boot/dts/freescale/imx8x-colibri-iris.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8x-colibri-iris.dtsi
@@ -48,8 +48,7 @@ pinctrl_gpio_iris: gpioirisgrp {
 			   <IMX8QXP_SAI0_TXFS_LSIO_GPIO0_IO28		0x20>,		/* SODIMM 101 */
 			   <IMX8QXP_SAI0_RXD_LSIO_GPIO0_IO27		0x20>,		/* SODIMM  97 */
 			   <IMX8QXP_ENET0_RGMII_RXC_LSIO_GPIO5_IO03	0x06000020>,	/* SODIMM  85 */
-			   <IMX8QXP_SAI0_TXC_LSIO_GPIO0_IO26		0x20>,		/* SODIMM  79 */
-			   <IMX8QXP_QSPI0A_DATA1_LSIO_GPIO3_IO10	0x06700041>;	/* SODIMM  45 */
+			   <IMX8QXP_SAI0_TXC_LSIO_GPIO0_IO26		0x20>;		/* SODIMM  79 */
 	};
 
 	pinctrl_uart1_forceoff: uart1forceoffgrp {
-- 
2.34.1