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Message-ID: <20230417074115.30786-3-hal.feng@starfivetech.com>
Date: Mon, 17 Apr 2023 15:41:15 +0800
From: Hal Feng <hal.feng@...rfivetech.com>
To: <linux-clk@...r.kernel.org>, <oe-kbuild-all@...ts.linux.dev>,
<linux-mm@...ck.org>
CC: Stephen Boyd <sboyd@...nel.org>,
Michael Turquette <mturquette@...libre.com>,
Conor Dooley <conor.dooley@...rochip.com>,
"Paul Gazzillo" <paul@...zz.com>,
Necip Fazil Yildiran <fazilyildiran@...il.com>,
Emil Renner Berthing <emil.renner.berthing@...onical.com>,
Hal Feng <hal.feng@...rfivetech.com>,
Xingyu Wu <xingyu.wu@...rfivetech.com>,
<linux-kernel@...r.kernel.org>
Subject: [PATCH v1 2/2] clk: starfive: Delete the redundant dev_set_drvdata() in JH7110 clock drivers
The dev_set_drvdata() is no longer needed after we used a wrapper
struct to get the data in auxiliary driver.
Cc: Xingyu Wu <xingyu.wu@...rfivetech.com>
Fixes: d1aae0663023 ("clk: starfive: Avoid casting iomem pointers")
Signed-off-by: Hal Feng <hal.feng@...rfivetech.com>
---
drivers/clk/starfive/clk-starfive-jh7110-aon.c | 2 --
drivers/clk/starfive/clk-starfive-jh7110-sys.c | 2 --
2 files changed, 4 deletions(-)
diff --git a/drivers/clk/starfive/clk-starfive-jh7110-aon.c b/drivers/clk/starfive/clk-starfive-jh7110-aon.c
index a2799fe8a234..62954eb7b50a 100644
--- a/drivers/clk/starfive/clk-starfive-jh7110-aon.c
+++ b/drivers/clk/starfive/clk-starfive-jh7110-aon.c
@@ -83,8 +83,6 @@ static int jh7110_aoncrg_probe(struct platform_device *pdev)
if (IS_ERR(priv->base))
return PTR_ERR(priv->base);
- dev_set_drvdata(priv->dev, (void *)(&priv->base));
-
for (idx = 0; idx < JH7110_AONCLK_END; idx++) {
u32 max = jh7110_aonclk_data[idx].max;
struct clk_parent_data parents[4] = {};
diff --git a/drivers/clk/starfive/clk-starfive-jh7110-sys.c b/drivers/clk/starfive/clk-starfive-jh7110-sys.c
index 851b93d0f371..e6031345ef05 100644
--- a/drivers/clk/starfive/clk-starfive-jh7110-sys.c
+++ b/drivers/clk/starfive/clk-starfive-jh7110-sys.c
@@ -402,8 +402,6 @@ static int __init jh7110_syscrg_probe(struct platform_device *pdev)
if (IS_ERR(priv->base))
return PTR_ERR(priv->base);
- dev_set_drvdata(priv->dev, (void *)(&priv->base));
-
/*
* These PLL clocks are not actually fixed factor clocks and can be
* controlled by the syscon registers of JH7110. They will be dropped
--
2.38.1
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