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Message-Id: <20230417092631.347976-12-rick.wertenbroek@gmail.com>
Date: Mon, 17 Apr 2023 11:26:29 +0200
From: Rick Wertenbroek <rick.wertenbroek@...il.com>
To: alberto.dassatti@...g-vd.ch
Cc: xxm@...k-chips.com, Damien Le Moal <dlemoal@...nel.org>,
Shawn Lin <shawn.lin@...k-chips.com>,
Bjorn Helgaas <bhelgaas@...gle.com>,
Lorenzo Pieralisi <lpieralisi@...nel.org>,
Krzysztof WilczyĆski <kw@...ux.com>,
Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Heiko Stuebner <heiko@...ech.de>,
Johan Jonker <jbx6244@...il.com>,
Caleb Connolly <kc@...tmarketos.org>,
Brian Norris <briannorris@...omium.org>,
Corentin Labbe <clabbe@...libre.com>,
Sascha Hauer <s.hauer@...gutronix.de>,
Hugh Cole-Baker <sigmaris@...il.com>,
Rick Wertenbroek <rick.wertenbroek@...il.com>,
Judy Hsiao <judyhsiao@...omium.org>,
Arnaud Ferraris <arnaud.ferraris@...labora.com>,
linux-pci@...r.kernel.org, linux-rockchip@...ts.infradead.org,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org
Subject: [PATCH v4 11/11] PCI: rockchip: Set address alignment for endpoint mode
From: Damien Le Moal <dlemoal@...nel.org>
The address translation unit of the rockchip EP controller does not use
the lower 8 bits of a PCIe-space address to map local memory. Thus we
must set the align feature field to 256 to let the user know about this
constraint.
Signed-off-by: Damien Le Moal <dlemoal@...nel.org>
---
drivers/pci/controller/pcie-rockchip-ep.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/pci/controller/pcie-rockchip-ep.c b/drivers/pci/controller/pcie-rockchip-ep.c
index edfced311a9f..0af0e965fb57 100644
--- a/drivers/pci/controller/pcie-rockchip-ep.c
+++ b/drivers/pci/controller/pcie-rockchip-ep.c
@@ -442,6 +442,7 @@ static const struct pci_epc_features rockchip_pcie_epc_features = {
.linkup_notifier = false,
.msi_capable = true,
.msix_capable = false,
+ .align = 256,
};
static const struct pci_epc_features*
--
2.25.1
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