linux-kernel - Re: [PATCH v2 1/5] arm64: dts: ti: k3-j784s4-main: Add system controller and SERDES lane mux

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Date:   Mon, 17 Apr 2023 10:07:24 +0530
From:   Vignesh Raghavendra <vigneshr@...com>
To:     Jayesh Choudhary <j-choudhary@...com>, <nm@...com>, <afd@...com>
CC:     <s-vadapalli@...com>, <kristo@...nel.org>, <robh+dt@...nel.org>,
        <krzysztof.kozlowski+dt@...aro.org>,
        <linux-arm-kernel@...ts.infradead.org>,
        <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v2 1/5] arm64: dts: ti: k3-j784s4-main: Add system
 controller and SERDES lane mux

Hi Jayesh

On 14/04/23 20:45, Jayesh Choudhary wrote:
> From: Siddharth Vadapalli <s-vadapalli@...com>
> 
> The system controller node manages the CTRL_MMR0 region.
> Add serdes_ln_ctrl node which is used for controlling the SERDES lane mux.
> 
> Signed-off-by: Siddharth Vadapalli <s-vadapalli@...com>
> Signed-off-by: Jayesh Choudhary <j-choudhary@...com>
> ---
>  arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 22 ++++++++++++++++++++++
>  1 file changed, 22 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
> index e9169eb358c1..344f4ffa0b82 100644
> --- a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
> @@ -5,6 +5,9 @@
>   * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
>   */
>  
> +#include <dt-bindings/mux/mux.h>
> +#include <dt-bindings/mux/ti-serdes.h>
> +
>  &cbass_main {
>  	msmc_ram: sram@...00000 {
>  		compatible = "mmio-sram";
> @@ -26,6 +29,25 @@ l3cache-sram@...000 {
>  		};
>  	};
>  
> +	scm_conf: scm-conf@...000 {

generic node name please: "syscon@"

> +		compatible = "ti,j721e-system-controller", "syscon", "simple-mfd";
> +		reg = <0x00 0x00100000 0x00 0x1c000>;
> +		#address-cells = <1>;
> +		#size-cells = <1>;
> +		ranges = <0x00 0x00 0x00100000 0x1c000>;
> +
> +		serdes_ln_ctrl: mux-controller@...0 {

Either add reg property or replace @ with -

Run make with W=12 to catch such errors.

> +			compatible = "mmio-mux";
> +			#mux-control-cells = <1>;
> +			mux-reg-masks = <0x4080 0x3>, <0x4084 0x3>, /* SERDES0 lane0/1 select */
> +					<0x4088 0x3>, <0x408c 0x3>, /* SERDES0 lane2/3 select */
> +					<0x4090 0x3>, <0x4094 0x3>, /* SERDES1 lane0/1 select */
> +					<0x4098 0x3>, <0x409c 0x3>, /* SERDES1 lane2/3 select */
> +					<0x40a0 0x3>, <0x40a4 0x3>, /* SERDES2 lane0/1 select */
> +					<0x40a8 0x3>, <0x40ac 0x3>; /* SERDES2 lane2/3 select */
> +		};
> +	};
> +
>  	gic500: interrupt-controller@...0000 {
>  		compatible = "arm,gic-v3";
>  		#address-cells = <2>;

-- 
Regards
Vignesh