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Message-Id: <168173287047.3661649.9384527225958097521.b4-ty@kernel.org>
Date: Mon, 17 Apr 2023 16:03:02 +0100
From: Will Deacon <will@...nel.org>
To: Catalin Marinas <catalin.marinas@....com>,
Mark Brown <broonie@...nel.org>
Cc: kernel-team@...roid.com, Will Deacon <will@...nel.org>,
Anshuman Khandual <anshuman.khandual@....com>,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
Joey Gouly <joey.gouly@....com>
Subject: Re: [PATCH v5] arm64/sysreg: Convert HFGITR_EL2 to automatic generation
On Wed, 12 Apr 2023 17:26:43 +0100, Mark Brown wrote:
> Automatically generate the Hypervisor Fine-Grained Instruction Trap
> Register as per DDI0601 2023-03, currently we only have a definition for
> the register name not any of the contents. No functional change.
>
>
Applied to arm64 (for-next/sysreg), thanks!
[1/1] arm64/sysreg: Convert HFGITR_EL2 to automatic generation
https://git.kernel.org/arm64/c/bbd329fe723d
Cheers,
--
Will
https://fixes.arm64.dev
https://next.arm64.dev
https://will.arm64.dev
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