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Message-Id: <20230418074008.69752-5-me@crly.cz>
Date: Tue, 18 Apr 2023 09:40:05 +0200
From: Roman Beranek <me@...y.cz>
To: Maxime Ripard <mripard@...nel.org>, Chen-Yu Tsai <wens@...e.org>,
David Airlie <airlied@...il.com>,
Daniel Vetter <daniel@...ll.ch>,
Jernej Skrabec <jernej.skrabec@...il.com>,
Samuel Holland <samuel@...lland.org>
Cc: Roman Beranek <me@...y.cz>, Frank Oltmanns <frank@...manns.dev>,
Icenowy Zheng <icenowy@...p.io>, Ondrej Jirman <megi@....cz>,
dri-devel@...ts.freedesktop.org,
linux-arm-kernel@...ts.infradead.org, linux-sunxi@...ts.linux.dev,
linux-kernel@...r.kernel.org
Subject: [PATCH v2 4/7] arm64: dts: allwinner: a64: assign PLL_MIPI to CLK_TCON0
Assign pll-mipi parent to tcon0's source clock via 'assigned-clocks'.
Signed-off-by: Roman Beranek <me@...y.cz>
---
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
index 62f45f71ec65..e6a194db420d 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
@@ -411,6 +411,8 @@ tcon0: lcd-controller@...c000 {
#clock-cells = <0>;
resets = <&ccu RST_BUS_TCON0>, <&ccu RST_BUS_LVDS>;
reset-names = "lcd", "lvds";
+ assigned-clocks = <&ccu CLK_TCON0>;
+ assigned-clock-parents = <&ccu CLK_PLL_MIPI>;
ports {
#address-cells = <1>;
--
2.34.1
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