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Message-Id: <3b9c4f05eaf14bc3b16aebec3ff84c8a2d52c4a5.1681887790.git.zhoubinbin@loongson.cn>
Date:   Wed, 19 Apr 2023 15:17:05 +0800
From:   Binbin Zhou <zhoubinbin@...ngson.cn>
To:     Huacai Chen <chenhuacai@...nel.org>,
        WANG Xuerui <kernel@...0n.name>,
        Jiaxun Yang <jiaxun.yang@...goat.com>,
        Thomas Gleixner <tglx@...utronix.de>,
        Marc Zyngier <maz@...nel.org>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>
Cc:     Jianmin Lv <lvjianmin@...ngson.cn>,
        Huacai Chen <chenhuacai@...ngson.cn>,
        linux-kernel@...r.kernel.org, linux-mips@...r.kernel.org,
        loongarch@...ts.linux.dev, devicetree@...r.kernel.org,
        loongson-kernel@...ts.loongnix.cn,
        Binbin Zhou <zhoubinbin@...ngson.cn>
Subject: [PATCH V3 1/2] dt-bindings: interrupt-controller: Add Loongson EIOINTC

Add Loongson Extended I/O Interrupt controller binding with DT schema
format using json-schema.

Signed-off-by: Binbin Zhou <zhoubinbin@...ngson.cn>
---
 .../loongson,eiointc.yaml                     | 74 +++++++++++++++++++
 1 file changed, 74 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml

diff --git a/Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml b/Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml
new file mode 100644
index 000000000000..4ab4efb061e1
--- /dev/null
+++ b/Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml
@@ -0,0 +1,74 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/interrupt-controller/loongson,eiointc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Loongson Extended I/O Interrupt Controller
+
+maintainers:
+  - Binbin Zhou <zhoubinbin@...ngson.cn>
+
+description: |
+  This interrupt controller is found on the Loongson-3 family chips and
+  Loongson-2K series chips and is used to distribute interrupts directly to
+  individual cores without forwarding them through the HT's interrupt line.
+
+allOf:
+  - $ref: /schemas/interrupt-controller.yaml#
+
+properties:
+  compatible:
+    enum:
+      - loongson,ls2k0500-eiointc
+      - loongson,ls2k2000-eiointc
+
+  reg:
+    items:
+      - description: Interrupt enable registers
+      - description: Interrupt status registers
+      - description: Interrupt clear registers
+      - description: Interrupt routing configuration registers
+
+  reg-names:
+    items:
+      - const: enable
+      - const: status
+      - const: clear
+      - const: route
+
+  interrupts:
+    maxItems: 1
+
+  interrupt-controller: true
+
+  '#interrupt-cells':
+    const: 1
+
+required:
+  - compatible
+  - reg
+  - interrupts
+  - interrupt-controller
+  - '#interrupt-cells'
+
+unevaluatedProperties: false
+
+examples:
+  - |
+    eiointc: interrupt-controller@...11600 {
+      compatible = "loongson,ls2k0500-eiointc";
+      reg = <0x1fe11600 0x10>,
+            <0x1fe11700 0x10>,
+            <0x1fe11800 0x10>,
+            <0x1fe114c0 0x4>;
+      reg-names = "enable", "status", "clear", "route";
+
+      interrupt-controller;
+      #interrupt-cells = <1>;
+
+      interrupt-parent = <&cpuintc>;
+      interrupts = <3>;
+    };
+
+...
-- 
2.39.1

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