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Message-Id: <168201218504.13763.1031176103296142331.b4-ty@rivosinc.com>
Date: Thu, 20 Apr 2023 10:36:25 -0700
From: Palmer Dabbelt <palmer@...osinc.com>
To: Evan Green <evan@...osinc.com>
Cc: slewis@...osinc.com, heiko@...ech.de,
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Subject: Re: [PATCH v6 0/6] RISC-V Hardware Probing User Interface
On Fri, 07 Apr 2023 16:10:57 -0700, Evan Green wrote:
> There's been a bunch of off-list discussions about this, including at
> Plumbers. The original plan was to do something involving providing an
> ISA string to userspace, but ISA strings just aren't sufficient for a
> stable ABI any more: in order to parse an ISA string users need the
> version of the specifications that the string is written to, the version
> of each extension (sometimes at a finer granularity than the RISC-V
> releases/versions encode), and the expected use case for the ISA string
> (ie, is it a U-mode or M-mode string). That's a lot of complexity to
> try and keep ABI compatible and it's probably going to continue to grow,
> as even if there's no more complexity in the specifications we'll have
> to deal with the various ISA string parsing oddities that end up all
> over userspace.
>
> [...]
Applied, thanks!
[1/6] RISC-V: Move struct riscv_cpuinfo to new header
https://git.kernel.org/palmer/c/ff77cf5b2e03
[2/6] RISC-V: Add a syscall for HW probing
https://git.kernel.org/palmer/c/ea3de9ce8aa2
[3/6] RISC-V: hwprobe: Add support for RISCV_HWPROBE_BASE_BEHAVIOR_IMA
https://git.kernel.org/palmer/c/00e76e2c6a2b
[4/6] RISC-V: hwprobe: Support probing of misaligned access performance
https://git.kernel.org/palmer/c/62a31d6e38bd
[5/6] selftests: Test the new RISC-V hwprobe interface
https://git.kernel.org/palmer/c/287dcc2b0c83
[6/6] RISC-V: Add hwprobe vDSO function and data
https://git.kernel.org/palmer/c/aa5af0aa90ba
Best regards,
--
Palmer Dabbelt <palmer@...osinc.com>
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