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Message-ID: <b0819ff8-8fba-4464-9a62-be56d4bfa4cd@collabora.com>
Date:   Thu, 20 Apr 2023 09:47:33 +0200
From:   AngeloGioacchino Del Regno 
        <angelogioacchino.delregno@...labora.com>
To:     Daniel Golle <daniel@...rotopia.org>, linux-pwm@...r.kernel.org,
        linux-mediatek@...ts.infradead.org,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
        Thierry Reding <thierry.reding@...il.com>,
        Uwe Kleine-König <u.kleine-koenig@...gutronix.de>,
        Matthias Brugger <matthias.bgg@...il.com>,
        John Crispin <john@...ozen.org>
Subject: Re: [PATCH 2/2] pwm: mediatek: Add support for MT7981

Il 19/04/23 21:25, Daniel Golle ha scritto:
> The PWM unit on MT7981 uses different register offsets than previous
> MediaTek PWM units. Add support for these new offsets and add support
> for PWM on MT7981 which has 3 PWM channels, one of them is typically
> used for a temperature controlled fan.
> 
> Signed-off-by: Daniel Golle <daniel@...rotopia.org>
> ---
>   drivers/pwm/pwm-mediatek.c | 54 ++++++++++++++++++++++++++++++++------
>   1 file changed, 46 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/pwm/pwm-mediatek.c b/drivers/pwm/pwm-mediatek.c
> index 5b5eeaff35da6..2bfb5bedf570b 100644
> --- a/drivers/pwm/pwm-mediatek.c
> +++ b/drivers/pwm/pwm-mediatek.c
> @@ -34,10 +34,14 @@
>   
>   #define PWM_CLK_DIV_MAX		7
>   
> +#define REG_V1			1
> +#define REG_V2			2
> +
>   struct pwm_mediatek_of_data {
>   	unsigned int num_pwms;
>   	bool pwm45_fixup;
>   	bool has_ck_26m_sel;
> +	u8 reg_ver;

You're overcomplicating this one... checking for a register version and then
deciding at every pwm_mediatek_writel() call what to use...

It's way simpler than that!
Pass a pointer to the register array in pwm_mediatek_of_data and then...

>   };
>   
>   /**
> @@ -59,10 +63,14 @@ struct pwm_mediatek_chip {
>   	const struct pwm_mediatek_of_data *soc;
>   };
>   
> -static const unsigned int pwm_mediatek_reg_offset[] = {
> +static const unsigned int mtk_pwm_reg_offset_v1[] = {
>   	0x0010, 0x0050, 0x0090, 0x00d0, 0x0110, 0x0150, 0x0190, 0x0220
>   };
>   
> +static const unsigned int mtk_pwm_reg_offset_v2[] = {
> +	0x0080, 0x00c0, 0x0100, 0x0140, 0x0180, 0x1c0, 0x200, 0x0240
> +};
> +
>   static inline struct pwm_mediatek_chip *
>   to_pwm_mediatek_chip(struct pwm_chip *chip)
>   {
> @@ -111,7 +119,19 @@ static inline void pwm_mediatek_writel(struct pwm_mediatek_chip *chip,
>   				       unsigned int num, unsigned int offset,
>   				       u32 value)
>   {
> -	writel(value, chip->regs + pwm_mediatek_reg_offset[num] + offset);

...this simply becomes:

writel(value, chip->regs + chip->reg_offset[num] + offset);

> +	u32 pwm_offset;
> +
> +	switch (chip->soc->reg_ver) {
> +	case REG_V2:
> +		pwm_offset = mtk_pwm_reg_offset_v2[num];
> +		break;
> +
> +	case REG_V1:
> +	default:
> +		pwm_offset = mtk_pwm_reg_offset_v1[num];
> +	}
> +
> +	writel(value, chip->regs + pwm_offset + offset);
>   }
>   
>   static int pwm_mediatek_config(struct pwm_chip *chip, struct pwm_device *pwm,
> @@ -285,60 +305,77 @@ static const struct pwm_mediatek_of_data mt2712_pwm_data = {
>   	.num_pwms = 8,
>   	.pwm45_fixup = false,
>   	.has_ck_26m_sel = false,
> +	.reg_ver = REG_V1,

...so instead of assigning that, you'd be assigning

	.reg_offset = mtk_pwm_reg_offset_v1;

Better, right? :-)

Cheers,
Angelo



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