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Message-ID: <ZEFjQtOCQCvQJ1k/@yilunxu-OptiPlex-7050>
Date: Fri, 21 Apr 2023 00:07:30 +0800
From: Xu Yilun <yilun.xu@...el.com>
To: Ilpo Järvinen <ilpo.jarvinen@...ux.intel.com>
Cc: Wu Hao <hao.wu@...el.com>, Tom Rix <trix@...hat.com>,
Moritz Fischer <mdf@...nel.org>, linux-fpga@...r.kernel.org,
Lee Jones <lee@...nel.org>, Jean Delvare <jdelvare@...e.com>,
Guenter Roeck <linux@...ck-us.net>,
Russ Weight <russell.h.weight@...el.com>,
linux-kernel@...r.kernel.org, linux-hwmon@...r.kernel.org
Subject: Re: [PATCH v3 4/4] mfd: intel-m10-bmc: Manage access to MAX 10 fw
handshake registers
On 2023-04-17 at 12:26:53 +0300, Ilpo Järvinen wrote:
> On some MAX 10 cards, the BMC firmware is not available to service
> handshake registers during secure update erase and write phases at
> normal speeds. This problem affects at least hwmon driver. When the MAX
> 10 hwmon driver tries to read the sensor values during a secure update,
> the reads are slowed down (e.g., reading all D5005 sensors takes ~24s
> which is magnitudes worse than the normal <0.02s).
>
> Manage access to the handshake registers using a rw semaphore and a FW
> state variable to prevent accesses during those secure update phases
> and return -EBUSY instead.
>
> If handshake_sys_reg_nranges == 0, don't update bwcfw_state as it is not
> used. This avoids the locking cost.
>
> Co-developed-by: Russ Weight <russell.h.weight@...el.com>
> Signed-off-by: Russ Weight <russell.h.weight@...el.com>
> Co-developed-by: Xu Yilun <yilun.xu@...el.com>
> Signed-off-by: Xu Yilun <yilun.xu@...el.com>
> Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@...ux.intel.com>
Reviewed-by: Xu Yilun <yilun.xu@...el.com>
Hi Lee:
Could the fpga part also been applied to mfd tree when everyone is good?
Thanks,
Yilun
> ---
> drivers/fpga/intel-m10-bmc-sec-update.c | 17 +++++--
> drivers/mfd/intel-m10-bmc-core.c | 67 ++++++++++++++++++++++++-
> drivers/mfd/intel-m10-bmc-spi.c | 14 ++++++
> include/linux/mfd/intel-m10-bmc.h | 28 +++++++++++
> 4 files changed, 121 insertions(+), 5 deletions(-)
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