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Message-ID: <20230421190617.GA1626748-robh@kernel.org>
Date: Fri, 21 Apr 2023 14:06:17 -0500
From: Rob Herring <robh@...nel.org>
To: Neha Malcom Francis <n-francis@...com>
Cc: krzysztof.kozlowski+dt@...aro.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
nm@...com, vigneshr@...com, u-kumar1@...com
Subject: Re: [PATCH v2 1/3] dt-bindings: misc: esm: Add ESM support for TI K3
devices
On Wed, Apr 19, 2023 at 02:55:57PM +0530, Neha Malcom Francis wrote:
> Document the binding for TI K3 ESM (Error Signaling Module) block.
>
> Signed-off-by: Neha Malcom Francis <n-francis@...com>
> ---
> .../bindings/hwmon/ti,j721e-esm.yaml | 55 +++++++++++++++++++
> 1 file changed, 55 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/hwmon/ti,j721e-esm.yaml
>
> diff --git a/Documentation/devicetree/bindings/hwmon/ti,j721e-esm.yaml b/Documentation/devicetree/bindings/hwmon/ti,j721e-esm.yaml
> new file mode 100644
> index 000000000000..7b23ac7cb3ba
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/hwmon/ti,j721e-esm.yaml
> @@ -0,0 +1,55 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +# Copyright (C) 2022 Texas Instruments Incorporated
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/hwmon/ti,j721e-esm.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Texas Instruments K3 ESM
> +
> +maintainers:
> + - Neha Malcom Francis <n-francis@...com>
> +
> +description:
> + The ESM (Error Signaling Module) is an IP block on TI K3 devices
> + that allows handling of safety events somewhat similar to what interrupt
> + controller would do. The safety signals have their separate paths within
> + the SoC, and they are handled by the ESM, which routes them to the proper
> + destination, which can be system reset, interrupt controller, etc. In the
> + simplest configuration the signals are just routed to reset the SoC.
> +
> +properties:
> + compatible:
> + const: ti,j721e-esm
> +
> + reg:
> + items:
> + - description: the ESM register set
That's kind of obvious... Just 'maxItems: 1' is sufficient here.
> +
> + ti,esm-pins:
> + $ref: /schemas/types.yaml#/definitions/uint32-array
> + description:
> + integer array of ESM interrupt pins to route to external event pin
> + which can be used to reset the SoC.
> + minItems: 1
> + maxItems: 255
> +
> +additionalProperties: false
> +
> +required:
> + - compatible
> + - reg
> + - ti,esm-pins
> +
> +examples:
> + - |
> + cbass_main {
> + #address-cells = <2>;
> + #size-cells = <2>;
> +
> + esm@...000 {
> + compatible = "ti,j721e-esm";
> + reg = <0x0 0x700000 0x0 0x1000>;
> + ti,esm-pins = <344>, <345>;
> + };
> + };
> --
> 2.34.1
>
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