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Message-ID: <168211223285.1785232.7377797349982243568.robh@kernel.org>
Date: Fri, 21 Apr 2023 16:23:53 -0500
From: Rob Herring <robh@...nel.org>
To: Minda Chen <minda.chen@...rfivetech.com>
Cc: Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Mason Huo <mason.huo@...rfivetech.com>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Vinod Koul <vkoul@...nel.org>,
Palmer Dabbelt <palmer@...belt.com>,
Paul Walmsley <paul.walmsley@...ive.com>,
Rob Herring <robh+dt@...nel.org>,
Philipp Zabel <p.zabel@...gutronix.de>,
Roger Quadros <rogerq@...nel.org>,
Pawel Laszczak <pawell@...ence.com>,
Peter Chen <peter.chen@...nel.org>, linux-usb@...r.kernel.org,
linux-riscv@...ts.infradead.org, Albert Ou <aou@...s.berkeley.edu>,
Conor Dooley <conor@...nel.org>,
Emil Renner Berthing <emil.renner.berthing@...onical.com>,
devicetree@...r.kernel.org,
Kishon Vijay Abraham I <kishon@...nel.org>,
linux-phy@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v5 2/7] dt-bindings: phy: Add StarFive JH7110 PCIe PHY
On Thu, 20 Apr 2023 19:00:47 +0800, Minda Chen wrote:
> Add StarFive JH7110 SoC PCIe 2.0 PHY dt-binding.
> PCIe PHY0 (phy@...10000) can be used as USB 3.0 PHY.
>
> Signed-off-by: Minda Chen <minda.chen@...rfivetech.com>
> Reviewed-by: Hal Feng <hal.feng@...rfivetech.com>
> ---
> .../phy/starfive,jh7110-pcie-phy.yaml | 58 +++++++++++++++++++
> 1 file changed, 58 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/phy/starfive,jh7110-pcie-phy.yaml
>
Reviewed-by: Rob Herring <robh@...nel.org>
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