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Message-Id: <20230421223215.115666-1-krzysztof.kozlowski@linaro.org>
Date: Sat, 22 Apr 2023 00:32:14 +0200
From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To: Wei Xu <xuwei5@...ilicon.com>, Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
linux-arm-kernel@...ts.infradead.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Cc: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
Subject: [PATCH] arm64: dts: hisilicon: add missing cache properties
As all level 2 and level 3 caches are unified, add required
cache-unified properties to fix warnings like:
hi3660-hikey960.dtb: l2-cache0: 'cache-unified' is a required property
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
---
Please take the patch via sub-arch SoC tree.
---
arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 2 ++
arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 2 ++
arch/arm64/boot/dts/hisilicon/hip05.dtsi | 4 ++++
arch/arm64/boot/dts/hisilicon/hip06.dtsi | 4 ++++
arch/arm64/boot/dts/hisilicon/hip07.dtsi | 16 ++++++++++++++++
5 files changed, 28 insertions(+)
diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
index a57f35eb5ef6..7e137a884ae5 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
@@ -204,11 +204,13 @@ CLUSTER_SLEEP_1: cluster-sleep-1 {
A53_L2: l2-cache0 {
compatible = "cache";
cache-level = <2>;
+ cache-unified;
};
A73_L2: l2-cache1 {
compatible = "cache";
cache-level = <2>;
+ cache-unified;
};
};
diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
index f6d3202b0d1a..872e9c73c422 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
@@ -187,11 +187,13 @@ cpu7: cpu@103 {
CLUSTER0_L2: l2-cache0 {
compatible = "cache";
cache-level = <2>;
+ cache-unified;
};
CLUSTER1_L2: l2-cache1 {
compatible = "cache";
cache-level = <2>;
+ cache-unified;
};
};
diff --git a/arch/arm64/boot/dts/hisilicon/hip05.dtsi b/arch/arm64/boot/dts/hisilicon/hip05.dtsi
index 5b2b1bfd0d2a..65ddc0698f82 100644
--- a/arch/arm64/boot/dts/hisilicon/hip05.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hip05.dtsi
@@ -212,21 +212,25 @@ cpu15: cpu@...03 {
cluster0_l2: l2-cache0 {
compatible = "cache";
cache-level = <2>;
+ cache-unified;
};
cluster1_l2: l2-cache1 {
compatible = "cache";
cache-level = <2>;
+ cache-unified;
};
cluster2_l2: l2-cache2 {
compatible = "cache";
cache-level = <2>;
+ cache-unified;
};
cluster3_l2: l2-cache3 {
compatible = "cache";
cache-level = <2>;
+ cache-unified;
};
};
diff --git a/arch/arm64/boot/dts/hisilicon/hip06.dtsi b/arch/arm64/boot/dts/hisilicon/hip06.dtsi
index 291c2ee38288..c588848bfdeb 100644
--- a/arch/arm64/boot/dts/hisilicon/hip06.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hip06.dtsi
@@ -212,21 +212,25 @@ cpu15: cpu@...03 {
cluster0_l2: l2-cache0 {
compatible = "cache";
cache-level = <2>;
+ cache-unified;
};
cluster1_l2: l2-cache1 {
compatible = "cache";
cache-level = <2>;
+ cache-unified;
};
cluster2_l2: l2-cache2 {
compatible = "cache";
cache-level = <2>;
+ cache-unified;
};
cluster3_l2: l2-cache3 {
compatible = "cache";
cache-level = <2>;
+ cache-unified;
};
};
diff --git a/arch/arm64/boot/dts/hisilicon/hip07.dtsi b/arch/arm64/boot/dts/hisilicon/hip07.dtsi
index 8a9436ca2531..595abe339c5d 100644
--- a/arch/arm64/boot/dts/hisilicon/hip07.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hip07.dtsi
@@ -843,81 +843,97 @@ cpu63: cpu@...03 {
cluster0_l2: l2-cache0 {
compatible = "cache";
cache-level = <2>;
+ cache-unified;
};
cluster1_l2: l2-cache1 {
compatible = "cache";
cache-level = <2>;
+ cache-unified;
};
cluster2_l2: l2-cache2 {
compatible = "cache";
cache-level = <2>;
+ cache-unified;
};
cluster3_l2: l2-cache3 {
compatible = "cache";
cache-level = <2>;
+ cache-unified;
};
cluster4_l2: l2-cache4 {
compatible = "cache";
cache-level = <2>;
+ cache-unified;
};
cluster5_l2: l2-cache5 {
compatible = "cache";
cache-level = <2>;
+ cache-unified;
};
cluster6_l2: l2-cache6 {
compatible = "cache";
cache-level = <2>;
+ cache-unified;
};
cluster7_l2: l2-cache7 {
compatible = "cache";
cache-level = <2>;
+ cache-unified;
};
cluster8_l2: l2-cache8 {
compatible = "cache";
cache-level = <2>;
+ cache-unified;
};
cluster9_l2: l2-cache9 {
compatible = "cache";
cache-level = <2>;
+ cache-unified;
};
cluster10_l2: l2-cache10 {
compatible = "cache";
cache-level = <2>;
+ cache-unified;
};
cluster11_l2: l2-cache11 {
compatible = "cache";
cache-level = <2>;
+ cache-unified;
};
cluster12_l2: l2-cache12 {
compatible = "cache";
cache-level = <2>;
+ cache-unified;
};
cluster13_l2: l2-cache13 {
compatible = "cache";
cache-level = <2>;
+ cache-unified;
};
cluster14_l2: l2-cache14 {
compatible = "cache";
cache-level = <2>;
+ cache-unified;
};
cluster15_l2: l2-cache15 {
compatible = "cache";
cache-level = <2>;
+ cache-unified;
};
};
--
2.34.1
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