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Message-ID: <20230421-dropper-upstage-200ae7e47092@spud>
Date: Fri, 21 Apr 2023 17:50:43 +0100
From: Conor Dooley <conor@...nel.org>
To: Walker Chen <walker.chen@...rfivetech.com>
Cc: Jaroslav Kysela <perex@...ex.cz>, Takashi Iwai <tiwai@...e.com>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor.dooley@...rochip.com>,
Emil Renner Berthing <emil.renner.berthing@...onical.com>,
Liam Girdwood <lgirdwood@...il.com>,
Mark Brown <broonie@...nel.org>, alsa-devel@...a-project.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-riscv@...ts.infradead.org
Subject: Re: [PATCH v2 4/4] riscv: dts: starfive: add tdm node and sound card
Hey Walker,
On Thu, Apr 20, 2023 at 10:41:18AM +0800, Walker Chen wrote:
> Add the tdm controller node and sound card for the StarFive JH7110 SoC.
Is this one of these waveshare things + a visionfive 2?
https://www.waveshare.com/wm8960-audio-hat.htm
I'm a bit lost as to why this needs a whole new board, should it not
just be an overlay that you can apply to the existing dts?
Taking this to an extreme, should I expect to see a new devicetree for
everything RPi hat that you decide to use with a VisionFive 2?
Also, it'd be nice to provide a Link: to where someone can find more
info on this combination of items. Google for "wm8960 visionfive 2"
gives me nothing, nor does "starfive audio card" etc.
Thanks,
Conor.
> Reviewed-by: Hal Feng <hal.feng@...rfivetech.com>
> Signed-off-by: Walker Chen <walker.chen@...rfivetech.com>
> ---
> arch/riscv/boot/dts/starfive/Makefile | 1 +
> .../starfive/jh7110-starfive-audio-card.dts | 67 +++++++++++++++++++
> .../jh7110-starfive-visionfive-2.dtsi | 40 +++++++++++
> arch/riscv/boot/dts/starfive/jh7110.dtsi | 21 ++++++
> 4 files changed, 129 insertions(+)
> create mode 100644 arch/riscv/boot/dts/starfive/jh7110-starfive-audio-card.dts
>
> diff --git a/arch/riscv/boot/dts/starfive/Makefile b/arch/riscv/boot/dts/starfive/Makefile
> index 170956846d49..cb22cb7f66b0 100644
> --- a/arch/riscv/boot/dts/starfive/Makefile
> +++ b/arch/riscv/boot/dts/starfive/Makefile
> @@ -4,3 +4,4 @@ dtb-$(CONFIG_ARCH_STARFIVE) += jh7100-starfive-visionfive-v1.dtb
>
> dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-starfive-visionfive-2-v1.2a.dtb
> dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-starfive-visionfive-2-v1.3b.dtb
> +dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-starfive-audio-card.dtb
> diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-audio-card.dts b/arch/riscv/boot/dts/starfive/jh7110-starfive-audio-card.dts
> new file mode 100644
> index 000000000000..967d9aa7d1e1
> --- /dev/null
> +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-audio-card.dts
> @@ -0,0 +1,67 @@
> +// SPDX-License-Identifier: GPL-2.0 OR MIT
> +/*
> + * Device Tree for JH7110 + Simple Audio Card
> + *
> + * Copyright (C) 2023 StarFive Technology Co., Ltd.
> + */
> +
> +/dts-v1/;
> +#include "jh7110-starfive-visionfive-2-v1.3b.dts"
> +
> +/ {
> + model = "StarFive VisionFive 2 Audio Board";
> + compatible = "starfive,visionfive-2-audio", "starfive,jh7110";
> +
> + wm8960_mclk: wm8960-mclk {
> + compatible = "fixed-clock";
> + clock-output-names = "wm8960_mclk";
> + #clock-cells = <0>;
> + clock-frequency = <24576000>;
> + };
> +
> + sound {
> + compatible = "simple-audio-card";
> +
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + simple-audio-card,name = "Starfive-TDM-Sound-Card";
> + simple-audio-card,widgets = "Microphone", "Mic Jack",
> + "Line", "Line In",
> + "Line", "Line Out",
> + "Speaker", "Speaker",
> + "Headphone", "Headphone Jack";
> + simple-audio-card,routing = "Headphone Jack", "HP_L",
> + "Headphone Jack", "HP_R",
> + "Speaker", "SPK_LP",
> + "Speaker", "SPK_LN",
> + "LINPUT1", "Mic Jack",
> + "LINPUT3", "Mic Jack",
> + "RINPUT1", "Mic Jack",
> + "RINPUT2", "Mic Jack";
> +
> + simple-audio-card,dai-link@0 {
> + reg = <0>;
> + format = "dsp_a";
> + bitclock-master = <&dailink_master>;
> + frame-master = <&dailink_master>;
> +
> + cpu {
> + sound-dai = <&tdm>;
> + };
> + dailink_master: codec {
> + sound-dai = <&wm8960>;
> + clocks = <&wm8960_mclk>;
> + };
> + };
> + };
> +};
> +
> +&i2c0 {
> + wm8960: codec@1a {
> + compatible = "wlf,wm8960";
> + reg = <0x1a>;
> + wlf,shared-lrclk;
> + #sound-dai-cells = <0>;
> + };
> +};
> diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
> index 1155b97b593d..19b5954ee72d 100644
> --- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
> +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
> @@ -214,6 +214,40 @@
> slew-rate = <0>;
> };
> };
> +
> + tdm0_pins: tdm0-pins {
> + tdm0-pins-tx {
> + pinmux = <GPIOMUX(44, GPOUT_SYS_TDM_TXD,
> + GPOEN_ENABLE,
> + GPI_NONE)>;
> + bias-pull-up;
> + drive-strength = <2>;
> + input-disable;
> + input-schmitt-disable;
> + slew-rate = <0>;
> + };
> +
> + tdm0-pins-rx {
> + pinmux = <GPIOMUX(61, GPOUT_HIGH,
> + GPOEN_DISABLE,
> + GPI_SYS_TDM_RXD)>;
> + input-enable;
> + };
> +
> + tdm0-pins-sync {
> + pinmux = <GPIOMUX(63, GPOUT_HIGH,
> + GPOEN_DISABLE,
> + GPI_SYS_TDM_SYNC)>;
> + input-enable;
> + };
> +
> + tdm0-pins-pcmclk {
> + pinmux = <GPIOMUX(38, GPOUT_HIGH,
> + GPOEN_DISABLE,
> + GPI_SYS_TDM_CLK)>;
> + input-enable;
> + };
> + };
> };
>
> &uart0 {
> @@ -221,3 +255,9 @@
> pinctrl-0 = <&uart0_pins>;
> status = "okay";
> };
> +
> +&tdm {
> + pinctrl-names = "default";
> + pinctrl-0 = <&tdm0_pins>;
> + status = "okay";
> +};
> diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi
> index 866313570a7e..cfda6fb0d91b 100644
> --- a/arch/riscv/boot/dts/starfive/jh7110.dtsi
> +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi
> @@ -366,6 +366,27 @@
> status = "disabled";
> };
>
> + tdm: tdm@...90000 {
> + compatible = "starfive,jh7110-tdm";
> + reg = <0x0 0x10090000 0x0 0x1000>;
> + clocks = <&syscrg JH7110_SYSCLK_TDM_AHB>,
> + <&syscrg JH7110_SYSCLK_TDM_APB>,
> + <&syscrg JH7110_SYSCLK_TDM_INTERNAL>,
> + <&syscrg JH7110_SYSCLK_TDM_TDM>,
> + <&syscrg JH7110_SYSCLK_MCLK_INNER>,
> + <&tdm_ext>;
> + clock-names = "tdm_ahb", "tdm_apb",
> + "tdm_internal", "tdm",
> + "mclk_inner", "tdm_ext";
> + resets = <&syscrg JH7110_SYSRST_TDM_AHB>,
> + <&syscrg JH7110_SYSRST_TDM_APB>,
> + <&syscrg JH7110_SYSRST_TDM_CORE>;
> + dmas = <&dma 20>, <&dma 21>;
> + dma-names = "rx","tx";
> + #sound-dai-cells = <0>;
> + status = "disabled";
> + };
> +
> stgcrg: clock-controller@...30000 {
> compatible = "starfive,jh7110-stgcrg";
> reg = <0x0 0x10230000 0x0 0x10000>;
> --
> 2.17.1
>
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