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Message-Id: <20230423141051.702990-41-mwen@igalia.com>
Date: Sun, 23 Apr 2023 13:10:52 -0100
From: Melissa Wen <mwen@...lia.com>
To: amd-gfx@...ts.freedesktop.org,
Harry Wentland <harry.wentland@....com>,
Rodrigo Siqueira <Rodrigo.Siqueira@....com>,
sunpeng.li@....com, Alex Deucher <alexander.deucher@....com>,
dri-devel@...ts.freedesktop.org, christian.koenig@....com,
Xinhui.Pan@....com, airlied@...il.com, daniel@...ll.ch
Cc: Joshua Ashton <joshua@...ggi.es>,
Sebastian Wick <sebastian.wick@...hat.com>,
Xaver Hugl <xaver.hugl@...il.com>,
Shashank Sharma <Shashank.Sharma@....com>,
Nicholas Kazlauskas <nicholas.kazlauskas@....com>,
sungjoon.kim@....com, Alex Hung <alex.hung@....com>,
linux-kernel@...r.kernel.org
Subject: [RFC PATCH 40/40] drm/amd/display: allow newer DC hardware to use degamma ROM for PQ/HLG
From: Joshua Ashton <joshua@...ggi.es>
Need to funnel the color caps through to these functions so it can check
that the hardware is capable.
Signed-off-by: Joshua Ashton <joshua@...ggi.es>
---
.../amd/display/amdgpu_dm/amdgpu_dm_color.c | 34 ++++++++++++-------
1 file changed, 21 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
index a034c0c0d383..f0b5f09b9146 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
@@ -336,6 +336,7 @@ static int amdgpu_dm_set_atomic_regamma(struct dc_stream_state *stream,
/**
* __set_input_tf - calculates the input transfer function based on expected
* input space.
+ * @caps: dc color capabilities
* @func: transfer function
* @lut: lookup table that defines the color space
* @lut_size: size of respective lut.
@@ -343,7 +344,7 @@ static int amdgpu_dm_set_atomic_regamma(struct dc_stream_state *stream,
* Returns:
* 0 in case of success. -ENOMEM if fails.
*/
-static int __set_input_tf(struct dc_transfer_func *func,
+static int __set_input_tf(struct dc_color_caps *caps, struct dc_transfer_func *func,
const struct drm_color_lut *lut, uint32_t lut_size)
{
struct dc_gamma *gamma = NULL;
@@ -360,7 +361,7 @@ static int __set_input_tf(struct dc_transfer_func *func,
__drm_lut_to_dc_gamma(lut, gamma, false);
}
- res = mod_color_calculate_degamma_params(NULL, func, gamma, gamma != NULL);
+ res = mod_color_calculate_degamma_params(caps, func, gamma, gamma != NULL);
if (gamma)
dc_gamma_release(&gamma);
@@ -512,7 +513,7 @@ static int amdgpu_dm_atomic_blend_lut(const struct drm_color_lut *blend_lut,
func_blend->tf = tf;
func_blend->sdr_ref_white_level = 80; /* hardcoded for now */
- ret = __set_input_tf(func_blend, blend_lut, blend_size);
+ ret = __set_input_tf(NULL, func_blend, blend_lut, blend_size);
} else {
func_blend->type = TF_TYPE_BYPASS;
func_blend->tf = TRANSFER_FUNCTION_LINEAR;
@@ -819,7 +820,8 @@ int amdgpu_dm_update_crtc_color_mgmt(struct dm_crtc_state *crtc,
}
static int map_crtc_degamma_to_dc_plane(struct dm_crtc_state *crtc,
- struct dc_plane_state *dc_plane_state)
+ struct dc_plane_state *dc_plane_state,
+ struct dc_color_caps *caps)
{
const struct drm_color_lut *degamma_lut;
enum dc_transfer_func_predefined tf = TRANSFER_FUNCTION_SRGB;
@@ -874,7 +876,7 @@ static int map_crtc_degamma_to_dc_plane(struct dm_crtc_state *crtc,
dc_plane_state->in_transfer_func->tf =
TRANSFER_FUNCTION_LINEAR;
- r = __set_input_tf(dc_plane_state->in_transfer_func,
+ r = __set_input_tf(caps, dc_plane_state->in_transfer_func,
degamma_lut, degamma_size);
if (r)
return r;
@@ -887,7 +889,7 @@ static int map_crtc_degamma_to_dc_plane(struct dm_crtc_state *crtc,
dc_plane_state->in_transfer_func->tf = tf;
if (tf != TRANSFER_FUNCTION_SRGB &&
- !mod_color_calculate_degamma_params(NULL,
+ !mod_color_calculate_degamma_params(caps,
dc_plane_state->in_transfer_func, NULL, false))
return -ENOMEM;
}
@@ -898,7 +900,8 @@ static int map_crtc_degamma_to_dc_plane(struct dm_crtc_state *crtc,
#ifdef CONFIG_STEAM_DECK
static int
__set_dm_plane_degamma(struct drm_plane_state *plane_state,
- struct dc_plane_state *dc_plane_state)
+ struct dc_plane_state *dc_plane_state,
+ struct dc_color_caps *color_caps)
{
struct dm_plane_state *dm_plane_state = to_dm_plane_state(plane_state);
const struct drm_color_lut *degamma_lut;
@@ -907,6 +910,9 @@ __set_dm_plane_degamma(struct drm_plane_state *plane_state,
bool has_degamma_lut;
int ret;
+ if (dc_plane_state->ctx && dc_plane_state->ctx->dc)
+ color_caps = &dc_plane_state->ctx->dc->caps.color;
+
degamma_lut = __extract_blob_lut(dm_plane_state->degamma_lut, °amma_size);
has_degamma_lut = degamma_lut &&
@@ -928,8 +934,8 @@ __set_dm_plane_degamma(struct drm_plane_state *plane_state,
dc_plane_state->in_transfer_func->type =
TF_TYPE_DISTRIBUTED_POINTS;
- ret = __set_input_tf(dc_plane_state->in_transfer_func,
- degamma_lut, degamma_size);
+ ret = __set_input_tf(color_caps, dc_plane_state->in_transfer_func,
+ degamma_lut, degamma_size);
if (ret)
return ret;
} else {
@@ -945,7 +951,8 @@ __set_dm_plane_degamma(struct drm_plane_state *plane_state,
static int
amdgpu_dm_plane_set_color_properties(struct drm_plane_state *plane_state,
- struct dc_plane_state *dc_plane_state)
+ struct dc_plane_state *dc_plane_state,
+ struct dc_color_caps *color_caps)
{
struct dm_plane_state *dm_plane_state = to_dm_plane_state(plane_state);
enum drm_transfer_function shaper_tf = DRM_TRANSFER_FUNCTION_DEFAULT;
@@ -1014,6 +1021,7 @@ int amdgpu_dm_update_plane_color_mgmt(struct dm_crtc_state *crtc,
struct drm_plane_state *plane_state,
struct dc_plane_state *dc_plane_state)
{
+ struct dc_color_caps *color_caps = NULL;
bool has_crtc_cm_degamma;
int ret;
@@ -1025,11 +1033,11 @@ int amdgpu_dm_update_plane_color_mgmt(struct dm_crtc_state *crtc,
has_crtc_cm_degamma = (crtc->cm_has_degamma || crtc->cm_is_degamma_srgb);
#ifdef CONFIG_STEAM_DECK
- ret = amdgpu_dm_plane_set_color_properties(plane_state, dc_plane_state);
+ ret = amdgpu_dm_plane_set_color_properties(plane_state, dc_plane_state, color_caps);
if(ret)
return ret;
- ret = __set_dm_plane_degamma(plane_state, dc_plane_state);
+ ret = __set_dm_plane_degamma(plane_state, dc_plane_state, color_caps);
if (ret != -EINVAL)
return ret;
@@ -1054,7 +1062,7 @@ int amdgpu_dm_update_plane_color_mgmt(struct dm_crtc_state *crtc,
* linearize (implicit degamma) from sRGB/BT709 according to
* the input space.
*/
- ret = map_crtc_degamma_to_dc_plane(crtc, dc_plane_state);
+ ret = map_crtc_degamma_to_dc_plane(crtc, dc_plane_state, color_caps);
if (ret)
return ret;
}
--
2.39.2
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