linux-kernel - [PATCH v2 2/2] thunderbolt: Move Intel quirks into quirks.c

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20230424195556.2233-2-mario.limonciello@amd.com>
Date:   Mon, 24 Apr 2023 14:55:55 -0500
From:   Mario Limonciello <mario.limonciello@....com>
To:     Andreas Noever <andreas.noever@...il.com>,
        Michael Jamet <michael.jamet@...el.com>,
        Mika Westerberg <mika.westerberg@...ux.intel.com>,
        Yehezkel Bernat <YehezkelShB@...il.com>
CC:     S Sanath <Sanath.S@....com>, <richard.gong@....com>,
        <Sanju.Mehta@....com>,
        Mario Limonciello <mario.limonciello@....com>,
        <linux-usb@...r.kernel.org>, <linux-kernel@...r.kernel.org>
Subject: [PATCH v2 2/2] thunderbolt: Move Intel quirks into quirks.c

There are two Intel specific quirks for auto clear and end to end
that are not specified in the quirks file.  Move them to this location
instead.

This does change it so that they're initialized at a different time,
than quirks currently run but no intended functional impacts.

Signed-off-by: Mario Limonciello <mario.limonciello@....com>
---
v1->v2:
 * New patch

I tried to base this off thunderbolt.git/next (tag: thunderbolt-for-v6.4-rc1)
but the following 2 commits are missing from that branch but are in 6.3-rc7:

7af9da8ce8f9 ("thunderbolt: Add quirk to disable CLx")
f0a57dd33b3e ("thunderbolt: Limit USB3 bandwidth of certain Intel USB4 host routers")

I cherry picked them first as this patch builds on them. It's expected that
this patch should apply on top of 6.4-rc1 properly.

I don't have the matching hardware so this patch is only compile tested.
---
 drivers/thunderbolt/nhi.c    | 27 ---------------------------
 drivers/thunderbolt/quirks.c | 27 +++++++++++++++++++++++++++
 drivers/thunderbolt/tb.h     |  4 ++++
 3 files changed, 31 insertions(+), 27 deletions(-)

diff --git a/drivers/thunderbolt/nhi.c b/drivers/thunderbolt/nhi.c
index c0aee5dc5237..1f8545d03030 100644
--- a/drivers/thunderbolt/nhi.c
+++ b/drivers/thunderbolt/nhi.c
@@ -43,8 +43,6 @@
 #define NHI_MAILBOX_TIMEOUT	500 /* ms */
 
 /* Host interface quirks */
-#define QUIRK_AUTO_CLEAR_INT	BIT(0)
-#define QUIRK_E2E		BIT(1)
 
 static int ring_interrupt_index(const struct tb_ring *ring)
 {
@@ -1147,30 +1145,6 @@ static void nhi_shutdown(struct tb_nhi *nhi)
 		nhi->ops->shutdown(nhi);
 }
 
-static void nhi_check_quirks(struct tb_nhi *nhi)
-{
-	if (nhi->pdev->vendor == PCI_VENDOR_ID_INTEL) {
-		/*
-		 * Intel hardware supports auto clear of the interrupt
-		 * status register right after interrupt is being
-		 * issued.
-		 */
-		nhi->quirks |= QUIRK_AUTO_CLEAR_INT;
-
-		switch (nhi->pdev->device) {
-		case PCI_DEVICE_ID_INTEL_FALCON_RIDGE_2C_NHI:
-		case PCI_DEVICE_ID_INTEL_FALCON_RIDGE_4C_NHI:
-			/*
-			 * Falcon Ridge controller needs the end-to-end
-			 * flow control workaround to avoid losing Rx
-			 * packets when RING_FLAG_E2E is set.
-			 */
-			nhi->quirks |= QUIRK_E2E;
-			break;
-		}
-	}
-}
-
 static int nhi_check_iommu_pdev(struct pci_dev *pdev, void *data)
 {
 	if (!pdev->external_facing ||
@@ -1322,7 +1296,6 @@ static int nhi_probe(struct pci_dev *pdev, const struct pci_device_id *id)
 	if (!nhi->tx_rings || !nhi->rx_rings)
 		return -ENOMEM;
 
-	nhi_check_quirks(nhi);
 	nhi_check_iommu(nhi);
 
 	res = nhi_init_msi(nhi);
diff --git a/drivers/thunderbolt/quirks.c b/drivers/thunderbolt/quirks.c
index 1157b8869bcc..da851e0760b7 100644
--- a/drivers/thunderbolt/quirks.c
+++ b/drivers/thunderbolt/quirks.c
@@ -26,6 +26,18 @@ static void quirk_clx_disable(struct tb_switch *sw)
 	tb_sw_dbg(sw, "disabling CL states\n");
 }
 
+static void quirk_auto_clear_interrupts(struct tb_switch *sw)
+{
+	sw->quirks |= QUIRK_AUTO_CLEAR_INT;
+	tb_sw_dbg(sw, "setting auto clear interrupts\n");
+}
+
+static void quirk_e2e(struct tb_switch *sw)
+{
+	sw->quirks |= QUIRK_E2E;
+	tb_sw_dbg(sw, "setting E2E flow control\n");
+}
+
 static void quirk_usb3_maximum_bandwidth(struct tb_switch *sw)
 {
 	struct tb_port *port;
@@ -51,6 +63,21 @@ static const struct tb_quirk tb_quirks[] = {
 	/* Dell WD19TB supports self-authentication on unplug */
 	{ 0x0000, 0x0000, 0x00d4, 0xb070, quirk_force_power_link },
 	{ 0x0000, 0x0000, 0x00d4, 0xb071, quirk_force_power_link },
+	/*
+	 * Intel hardware supports auto clear of the interrupt
+	 * status register right after interrupt is being
+	 * issued.
+	 */
+	{ 0x8087, 0x0000, 0x0000, 0x0000, quirk_auto_clear_interrupts },
+	/*
+	 * Falcon Ridge controller needs the end-to-end
+	 * flow control workaround to avoid losing Rx
+	 * packets when RING_FLAG_E2E is set.
+	 */
+	{ 0x8087, PCI_DEVICE_ID_INTEL_FALCON_RIDGE_2C_NHI, 0x0000, 0x0000,
+		  quirk_e2e },
+	{ 0x8087, PCI_DEVICE_ID_INTEL_FALCON_RIDGE_4C_NHI, 0x0000, 0x0000,
+		  quirk_e2e },
 	/*
 	 * Intel Goshen Ridge NVM 27 and before report wrong number of
 	 * DP buffers.
diff --git a/drivers/thunderbolt/tb.h b/drivers/thunderbolt/tb.h
index ce0a035800ab..07b19b17f6b5 100644
--- a/drivers/thunderbolt/tb.h
+++ b/drivers/thunderbolt/tb.h
@@ -27,6 +27,10 @@
 #define QUIRK_FORCE_POWER_LINK_CONTROLLER		BIT(0)
 /* Disable CLx if not supported */
 #define QUIRK_NO_CLX					BIT(1)
+/* Automatically clears interrupts status register */
+#define QUIRK_AUTO_CLEAR_INT				BIT(2)
+/* Needs end to end flow control */
+#define QUIRK_E2E					BIT(3)
 
 /**
  * struct tb_nvm - Structure holding NVM information
-- 
2.34.1