linux-kernel - Re: [PATCH] arm64: dts: imx: add missing cache properties

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Date:   Mon, 24 Apr 2023 09:46:27 +0800
From:   Peng Fan <peng.fan@....nxp.com>
To:     Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Shawn Guo <shawnguo@...nel.org>,
        Sascha Hauer <s.hauer@...gutronix.de>,
        Pengutronix Kernel Team <kernel@...gutronix.de>,
        Fabio Estevam <festevam@...il.com>,
        NXP Linux Team <linux-imx@....com>,
        devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH] arm64: dts: imx: add missing cache properties



On 4/22/2023 6:32 AM, Krzysztof Kozlowski wrote:
> As all level 2 and level 3 caches are unified, add required
> cache-unified properties to fix warnings like:
> 
>    imx8dxl-evk.dtb: l2-cache0: 'cache-unified' is a required property
> 
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>

Acked-by: Peng Fan <peng.fan@....com>

> 
> ---
> 
> Please take the patch via sub-arch SoC tree.
> ---
>   arch/arm64/boot/dts/freescale/imx8dxl.dtsi | 1 +
>   arch/arm64/boot/dts/freescale/imx8ulp.dtsi | 1 +
>   2 files changed, 2 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx8dxl.dtsi b/arch/arm64/boot/dts/freescale/imx8dxl.dtsi
> index 70fadd79851a..792b7224ca5b 100644
> --- a/arch/arm64/boot/dts/freescale/imx8dxl.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8dxl.dtsi
> @@ -60,6 +60,7 @@ A35_1: cpu@1 {
>   		A35_L2: l2-cache0 {
>   			compatible = "cache";
>   			cache-level = <2>;
> +			cache-unified;
>   		};
>   	};
>   
> diff --git a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
> index 32193a43ff49..57627bdaa851 100644
> --- a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
> @@ -52,6 +52,7 @@ A35_1: cpu@1 {
>   		A35_L2: l2-cache0 {
>   			compatible = "cache";
>   			cache-level = <2>;
> +			cache-unified;
>   		};
>   	};
>