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Message-ID: <a19a8b8f0156a2542e488f1be13facf45f03ccb2.camel@mediatek.com>
Date: Mon, 24 Apr 2023 03:31:03 +0000
From: Trevor Wu (吳文良) <Trevor.Wu@...iatek.com>
To: "robh+dt@...nel.org" <robh+dt@...nel.org>,
"krzysztof.kozlowski@...aro.org" <krzysztof.kozlowski@...aro.org>,
"broonie@...nel.org" <broonie@...nel.org>,
"tiwai@...e.com" <tiwai@...e.com>,
"lgirdwood@...il.com" <lgirdwood@...il.com>,
"krzysztof.kozlowski+dt@...aro.org"
<krzysztof.kozlowski+dt@...aro.org>,
"matthias.bgg@...il.com" <matthias.bgg@...il.com>,
"perex@...ex.cz" <perex@...ex.cz>,
"angelogioacchino.delregno@...labora.com"
<angelogioacchino.delregno@...labora.com>
CC: "linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"linux-mediatek@...ts.infradead.org"
<linux-mediatek@...ts.infradead.org>,
"alsa-devel@...a-project.org" <alsa-devel@...a-project.org>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>
Subject: Re: [PATCH v2 7/7] ASoC: dt-bindings: mediatek,mt8188-afe: add audio
properties
On Fri, 2023-04-21 at 18:43 +0200, Krzysztof Kozlowski wrote:
> On 21/04/2023 12:09, Trevor Wu wrote:
> > Assign top_a1sys_hp clock to 26M, and add apll1_d4 to clocks for
> > switching
> > the parent of top_a1sys_hp dynamically
> > On the other hand, "mediatek,infracfg" is included for bus
> > protection.
> >
> > Signed-off-by: Trevor Wu <trevor.wu@...iatek.com>
> > ---
> > .../bindings/sound/mediatek,mt8188-afe.yaml | 16
> > ++++++++++++++--
> > 1 file changed, 14 insertions(+), 2 deletions(-)
> >
> > diff --git
> > a/Documentation/devicetree/bindings/sound/mediatek,mt8188-afe.yaml
> > b/Documentation/devicetree/bindings/sound/mediatek,mt8188-afe.yaml
> > index 82ccb32f08f2..812e0702ca36 100644
> > --- a/Documentation/devicetree/bindings/sound/mediatek,mt8188-
> > afe.yaml
> > +++ b/Documentation/devicetree/bindings/sound/mediatek,mt8188-
> > afe.yaml
> > @@ -29,6 +29,10 @@ properties:
> > $ref: /schemas/types.yaml#/definitions/phandle
> > description: The phandle of the mediatek topckgen controller
> >
> > + mediatek,infracfg:
> > + $ref: /schemas/types.yaml#/definitions/phandle
> > + description: The phandle of the mediatek infracfg controller
> > +
> > power-domains:
> > maxItems: 1
> >
> > @@ -52,6 +56,7 @@ properties:
> > - description: mux for i2si1_mck
> > - description: mux for i2si2_mck
> > - description: audio 26m clock
> > + - description: audio pll1 divide 4
> >
> > clock-names:
> > items:
> > @@ -73,6 +78,7 @@ properties:
> > - const: i2si1_m_sel
> > - const: i2si2_m_sel
> > - const: adsp_audio_26m
> > + - const: apll1_d4
> >
> > mediatek,etdm-in1-cowork-source:
> > $ref: /schemas/types.yaml#/definitions/uint32
> > @@ -147,6 +153,8 @@ required:
> > - power-domains
> > - clocks
> > - clock-names
> > + - assigned-clocks
> > + - assigned-clock-parents
>
> You were explaining it last time, but it did not solve my concerns.
> Requiring these properties means that your hardware boots with
> incorrect
> clock parents, including result of any firmware, and there is no way
> it
> can correctly work without reparenting. What's more, this means that
> your clock hierarchy does not include these clocks for some reason,
> e.g.
> you need to reparent parents of some parent of your clock input,
> otherwise device cannot work. Cannot work never ever.
>
> Is this the case?
Thanks for your detailed explanation.
I just tried to initialize the clock to another clock parent for power
saving, so this is not the case. In other words, it's not a "must be"
property. I will remove them in V3.
Thanks,
Trevor
>
> Have in mind that bindings are used also by other OS and projects,
> like
> bootloaders, firmware etc.
>
> Best regards,
> Krzysztof
>
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