lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <2b56630aa93c1c1e9cd45a745046a12e.sboyd@kernel.org>
Date:   Mon, 24 Apr 2023 18:22:35 -0700
From:   Stephen Boyd <sboyd@...nel.org>
To:     Varadarajan Narayanan <quic_varada@...cinc.com>, agross@...nel.org,
        andersson@...nel.org, devicetree@...r.kernel.org,
        gregkh@...uxfoundation.org, kishon@...nel.org,
        konrad.dybcio@...aro.org, krzysztof.kozlowski+dt@...aro.org,
        linux-arm-msm@...r.kernel.org, linux-clk@...r.kernel.org,
        linux-kernel@...r.kernel.org, linux-phy@...ts.infradead.org,
        linux-usb@...r.kernel.org, mturquette@...libre.com,
        quic_wcheng@...cinc.com, robh+dt@...nel.org, vkoul@...nel.org
Cc:     Varadarajan Narayanan <quic_varada@...cinc.com>
Subject: Re: [PATCH v9 4/8] clk: qcom: gcc-ipq9574: Add USB related clocks

Quoting Varadarajan Narayanan (2023-04-21 08:54:46)
> diff --git a/drivers/clk/qcom/gcc-ipq9574.c b/drivers/clk/qcom/gcc-ipq9574.c
> index a4cf750..8d7f543 100644
> --- a/drivers/clk/qcom/gcc-ipq9574.c
> +++ b/drivers/clk/qcom/gcc-ipq9574.c
> @@ -2025,6 +2025,41 @@ static struct clk_regmap_mux usb0_pipe_clk_src = {
>         },
>  };
>  
> +static struct clk_branch gcc_usb0_pipe_clk = {
> +       .halt_reg = 0x2c054,
> +       .halt_check = BRANCH_HALT_DELAY,
> +       .clkr = {
> +               .enable_reg = 0x2c054,
> +               .enable_mask = BIT(0),
> +               .hw.init = &(struct clk_init_data){

const

> +                       .name = "gcc_usb0_pipe_clk",
> +                       .parent_hws = (const struct clk_hw *[]) {
> +                               &usb0_pipe_clk_src.clkr.hw
> +                       },
> +                       .num_parents = 1,
> +                       .flags = CLK_SET_RATE_PARENT,
> +                       .ops = &clk_branch2_ops,
> +               },
> +       },
> +};
> +
> +static struct clk_branch gcc_usb0_sleep_clk = {
> +       .halt_reg = 0x2c058,
> +       .clkr = {
> +               .enable_reg = 0x2c058,
> +               .enable_mask = BIT(0),
> +               .hw.init = &(struct clk_init_data){

const

> +                       .name = "gcc_usb0_sleep_clk",
> +                       .parent_hws = (const struct clk_hw *[]) {
> +                               &gcc_sleep_clk_src.clkr.hw
> +                       },
> +                       .num_parents = 1,
> +                       .flags = CLK_SET_RATE_PARENT,
> +                       .ops = &clk_branch2_ops,
> +               },
> +       },
> +};
> +
>  static const struct freq_tbl ftbl_sdcc_apps_clk_src[] = {
>         F(144000, P_XO, 16, 12, 125),
>         F(400000, P_XO, 12, 1, 5),

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ