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Message-ID: <87r0s7zpws.ffs@tglx>
Date: Tue, 25 Apr 2023 22:07:47 +0200
From: Thomas Gleixner <tglx@...utronix.de>
To: Sean Christopherson <seanjc@...gle.com>
Cc: Andrew Cooper <andrew.cooper3@...rix.com>,
Paul Menzel <pmenzel@...gen.mpg.de>,
linux-kernel@...r.kernel.org, x86@...nel.org,
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Paul McKenney <paulmck@...nel.org>,
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Oleksandr Natalenko <oleksandr@...alenko.name>,
"Guilherme G. Piccoli" <gpiccoli@...lia.com>,
Piotr Gorski <lucjan.lucjanov@...il.com>,
David Woodhouse <dwmw@...zon.co.uk>,
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Jürgen Groß <jgross@...e.com>,
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xen-devel@...ts.xenproject.org,
Russell King <linux@...linux.org.uk>,
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Catalin Marinas <catalin.marinas@....com>,
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Mark Rutland <mark.rutland@....com>,
Sabin Rapan <sabrapan@...zon.com>
Subject: Re: [patch 00/37] cpu/hotplug, x86: Reworked parallel CPU bringup
On Thu, Apr 20 2023 at 17:57, Thomas Gleixner wrote:
> On Thu, Apr 20 2023 at 07:51, Sean Christopherson wrote:
> Something like the completely untested below should just work whatever
> APIC ID the BIOS decided to dice.
>
> That might just work on SEV too without that GHCB muck, but what do I
> know.
It does not.
RDMSR(X2APIC_ID) is trapped via #VC which cannot be handled at that
point. Unfortunately the GHCB protocol does not provide a RDMSR
mechanism similar to the CPUID mechanism. Neither does the secure
firmware enforce CPUID(0xb):APICID to real APIC ID consistency.
So the hypervisor can dice the APIC IDs as long as they are consistent
with the provided ACPI/MADT table.
So no parallel startup for SEV for now.
Thanks,
tglx
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