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Message-ID: <fd22bfc4-b019-4445-acc5-f7902a2386fe@sirena.org.uk>
Date:   Wed, 26 Apr 2023 13:25:18 +0100
From:   Mark Brown <broonie@...nel.org>
To:     Rasmus Villemoes <linux@...musvillemoes.dk>
Cc:     Shawn Guo <shawnguo@...nel.org>,
        Sascha Hauer <s.hauer@...gutronix.de>,
        Pengutronix Kernel Team <kernel@...gutronix.de>,
        Fabio Estevam <festevam@...il.com>,
        NXP Linux Team <linux-imx@....com>,
        linux-spi@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-kernel@...r.kernel.org,
        Marc Kleine-Budde <mkl@...gutronix.de>,
        Kevin Groeneveld <kgroeneveld@...brook.com>
Subject: Re: [PATCH 0/3] spi: spi-imx: fix use of more than four chip selects

On Wed, Apr 26, 2023 at 09:19:29AM +0200, Rasmus Villemoes wrote:

> I did consider that approach, but rejected it because it wouldn't work
> with mixing native and gpio chip selects. Say, somebody uses SS0
> natively, but then also have four additional gpios. Then chipselect 4
> would end up activating both the SS0 pin as well as the gpio, selecting
> both devices.

> I don't know if that's really a realistic scenario. But at least I think
> the driver should then somehow have a way to indicate to the core that
> one should either use native or gpio chip selects, but not a mix.

I'm not sure this is sensible, it'll be a fairly rare situation and we
don't want to preclude using the built in chip select functionality for
some of the chip selects.  In a situation like this we only need to have
a single chip select to be managed as a GPIO rather than all of them,
which I'd expect to end up handled in the DT by not allocating that chip
select number.

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