linux-kernel - Re: [RFC PATCH 2/2] net: phy: dp83869: fix mii mode when rgmii strap cfg is used

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <5a2bc044-5fb0-4162-a75a-24c94f8ed3f7@lunn.ch>
Date:   Wed, 26 Apr 2023 14:41:05 +0200
From:   Andrew Lunn <andrew@...n.ch>
To:     Siddharth Vadapalli <s-vadapalli@...com>
Cc:     hkallweit1@...il.com, linux@...linux.org.uk, davem@...emloft.net,
        edumazet@...gle.com, kuba@...nel.org, pabeni@...hat.com,
        netdev@...r.kernel.org, linux-kernel@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org, srk@...com
Subject: Re: [RFC PATCH 2/2] net: phy: dp83869: fix mii mode when rgmii strap
 cfg is used

> >> @@ -692,8 +692,11 @@ static int dp83869_configure_mode(struct phy_device *phydev,
> >>  	/* Below init sequence for each operational mode is defined in
> >>  	 * section 9.4.8 of the datasheet.
> >>  	 */
> >> +	phy_ctrl_val = dp83869->mode;
> >> +	if (phydev->interface == PHY_INTERFACE_MODE_MII)
> >> +		phy_ctrl_val |= DP83869_OP_MODE_MII;
> > 
> > Should there be some validation here with dp83869->mode?
> > 
> > DP83869_RGMII_COPPER_ETHERNET, DP83869_RGMII_SGMII_BRIDGE etc don't
> > make sense if MII is being used. DP83869_100M_MEDIA_CONVERT and maybe
> > DP83869_RGMII_100_BASE seem to be the only valid modes with MII?
> 
> The DP83869_OP_MODE_MII macro corresponds to BIT(5) which is the RGMII_MII_SEL
> bit in the OP_MODE_DECODE register. If the RGMII_MII_SEL bit is set, MII mode is
> selected. If the bit is cleared, which is the default value, RGMII mode is
> selected. As pointed out by you, there are modes which aren't valid with MII
> mode. However, a mode which isn't valid with RGMII mode (default value of the
> RGMII_MII_SEL bit) also exists: DP83869_SGMII_COPPER_ETHERNET. For this reason,
> I believe that setting the bit when MII mode is requested shouldn't cause any
> issues.

If you say so. I was just thinking you could give the poor software
engineer a hint the hardware engineer has put on strapping resistors
which means the PHY is not going to work.

      Andrew