[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <AS1PR10MB5675F26ADC112F008B52F195EB6A9@AS1PR10MB5675.EURPRD10.PROD.OUTLOOK.COM>
Date: Thu, 27 Apr 2023 09:38:59 +0000
From: "Bouska, Zdenek" <zdenek.bouska@...mens.com>
To: Thomas Gleixner <tglx@...utronix.de>,
Will Deacon <will@...nel.org>,
Catalin Marinas <catalin.marinas@....com>
CC: "linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"Kiszka, Jan" <jan.kiszka@...mens.com>,
"linux-rt-users@...r.kernel.org" <linux-rt-users@...r.kernel.org>,
Nishanth Menon <nm@...com>, Puranjay Mohan <p-mohan@...com>
Subject: Re: Unfair qspinlocks on ARM64 without LSE atomics => 3ms delay in
interrupt handling
> Why is this interrupt handling specific? Just because it's the place
> where you observed it?
Yes.
> So if that helps, then this needs to be addressed globaly and not with
> some crude hack in the interrupt handling code.
I just wrote, what helps for me. I didn't mean it as a proposal for merge.
Sorry for confusion.
I tried using Will's cpu_relax() implementation [1] everywhere but I was not
successful with that yet. ARM64's VDSO makes it complicating and even
if I left original cpu_relax() just in VDSO, Linux did not boot for me.
Thank you all!
[1] https://lore.kernel.org/lkml/20170728092831.GA24839@arm.com/
Zdenek Bouska
--
Siemens, s.r.o
Siemens Advanta Development
Powered by blists - more mailing lists