linux-kernel - Re: [EXTERNAL] Re: [PATCH 1/5] arm64: dts: ti: k3-j7200: Add general purpose timers

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Message-ID: <24ea8982-e2ab-d58d-dedd-f51703d0bb92@ti.com>
Date:   Thu, 27 Apr 2023 15:39:00 +0530
From:   "Kumar, Udit" <u-kumar1@...com>
To:     Tony Lindgren <tony@...mide.com>
CC:     <nm@...com>, <vigneshr@...com>, <kristo@...nel.org>,
        <robh+dt@...nel.org>, <krzysztof.kozlowski+dt@...aro.org>,
        <linux-arm-kernel@...ts.infradead.org>,
        <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        <m-chawdhry@...com>, <n-francis@...com>, <u-kumar1@...com>
Subject: Re: [EXTERNAL] Re: [PATCH 1/5] arm64: dts: ti: k3-j7200: Add general
 purpose timers

Hi Tony

On 4/27/2023 1:30 PM, Tony Lindgren wrote:
> Hi,
>
> * Udit Kumar <u-kumar1@...com> [230426 10:38]:
>> There are 20 general purpose timers on j7200 that can be used for things
>> like PWM using pwm-omap-dmtimer driver. There are also additional ten
>> timers in the MCU domain.
> ...
>
> ....
> Oh so also the MCU timers now have interrupts, nice. Can you please check
> if what we have in the comments the other SoCs in the dtsi files for MCU
> timers not having routable interrupts is correct?

checked for AM65 and AM64, looks these SOC follow different IT map wrt J7200

On J7200 reading TRM

https://www.ti.com/lit/pdf/spruiu1

Section 9.4.3.1.2 GIC500 SPI Interrupt Map, table Table 9-109.

MCU_TIMER0_INTR_PEND_0 (848) to MCU_TIMER9_INTR_PEND_0 (857)

looks to be available for A core.

> Also, should the MCU timers be still tagged with status = "reserved"?
Will mark status as  reserved
> See the comments in k3-am62-mcu.dtsi for example for both questions.
>
> Regards,
>
> Tony