linux-kernel - Re: [PATCH v3 4/7] arm64: dts: allwinner: a64: reset pll-video0 rate

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Message-ID: <4477541.LvFx2qVVIh@jernej-laptop>
Date:   Fri, 28 Apr 2023 08:43:29 +0200
From:   Jernej Škrabec <jernej.skrabec@...il.com>
To:     Maxime Ripard <mripard@...nel.org>, Chen-Yu Tsai <wens@...e.org>,
        David Airlie <airlied@...il.com>,
        Daniel Vetter <daniel@...ll.ch>,
        Samuel Holland <samuel@...lland.org>,
        Roman Beranek <me@...y.cz>
Cc:     Roman Beranek <me@...y.cz>, Frank Oltmanns <frank@...manns.dev>,
        Icenowy Zheng <icenowy@...c.io>, Ondrej Jirman <megi@....cz>,
        dri-devel@...ts.freedesktop.org,
        linux-arm-kernel@...ts.infradead.org, linux-sunxi@...ts.linux.dev,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3 4/7] arm64: dts: allwinner: a64: reset pll-video0 rate

Dne četrtek, 27. april 2023 ob 11:16:08 CEST je Roman Beranek napisal(a):
> With pll-mipi as its source clock, the exact rate to which TCON0's data
> clock can be set to is constrained by the current rate of pll-video0.
> Unless changed on a request of another consumer, the rate of pll-video0
> is left as inherited from the bootloader.
> 
> The default rate on reset is 297 MHz, a value preferable to what it is
> later set to in u-boot (294 MHz). This happens unintentionally though,
> as u-boot, for the sake of simplicity, rounds the rate requested by DE2
> driver (297 MHz) to 6 MHz steps.
> 
> Reset the PLL to its default rate of 297 MHz.

Why would that be preferable? You actually dropped "clk: sunxi-ng: a64: 
propagate rate change from pll-mipi" patch which would take care for adjusting 
parent rate to correct value.

Best regards,
Jernej

> 
> Signed-off-by: Roman Beranek <me@...y.cz>
> ---
>  arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi index
> e6a194db420d..cfc60dce80b0 100644
> --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
> @@ -667,6 +667,9 @@ ccu: clock@...0000 {
>  			clock-names = "hosc", "losc";
>  			#clock-cells = <1>;
>  			#reset-cells = <1>;
> +
> +			assigned-clocks = <&ccu CLK_PLL_VIDEO0>;
> +			assigned-clock-rates = <297000000>;
>  		};
> 
>  		pio: pinctrl@...0800 {