linux-kernel - Re: Unfair qspinlocks on ARM64 without LSE atomics => 3ms delay in interrupt handling

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Message-ID: <87wn1wv4o0.fsf@kurt>
Date:   Fri, 28 Apr 2023 09:37:03 +0200
From:   Kurt Kanzenbach <kurt@...utronix.de>
To:     Sebastian Andrzej Siewior <bigeasy@...utronix.de>
Cc:     Jan Kiszka <jan.kiszka@...mens.com>,
        Thomas Gleixner <tglx@...utronix.de>,
        "Bouska, Zdenek" <zdenek.bouska@...mens.com>,
        Will Deacon <will@...nel.org>,
        Catalin Marinas <catalin.marinas@....com>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "linux-rt-users@...r.kernel.org" <linux-rt-users@...r.kernel.org>,
        Nishanth Menon <nm@...com>, Puranjay Mohan <p-mohan@...com>
Subject: Re: Unfair qspinlocks on ARM64 without LSE atomics => 3ms delay in
 interrupt handling

On Fri Apr 28 2023, Sebastian Andrzej Siewior wrote:
> On 2023-04-27 15:45:09 [+0200], Kurt Kanzenbach wrote:
>> > Are we aware of other concrete case where it bites? Even with just
>> > "normal" contented spin_lock usage?
>> 
>> Well, some years ago I've observed a similar problem with ARM64
>> spinlocks, cpu_relax() and retry loops (in the futex code). It also
>> generated latency spikes up to 2-3ms. Back then, it was easily
>> reproducible using stress-ng --ptrace 4.
>
> That was fixed by
> 	https://patchwork.kernel.org/project/linux-arm-kernel/patch/1399528508-2806-1-git-send-email-arjun.kv@samsung.com
>
> if my memory serves me well.

We've had a different processor, but yes, we configured CPUACTLR_EL1[31]
to 1 in U-Boot to avoid any kernel modifications. Maybe it helps here
too?

Thanks,
Kurt

[1] - https://developer.arm.com/documentation/100095/0003/way1382037666700

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