linux-kernel - Re: [PATCH v3 1/5] phy: amlogic: enable/disable clkin during Amlogic USB PHY init/exit

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Message-ID: <CAFBinCA+-RXGOzF=Z7kdY3Ct5uME5qcKJ1BJoXJwdjs8_qiByA@mail.gmail.com>
Date:   Mon, 1 May 2023 14:49:42 +0200
From:   Martin Blumenstingl <martin.blumenstingl@...glemail.com>
To:     Dmitry Rokosov <ddrokosov@...rdevices.ru>
Cc:     gregkh@...uxfoundation.org, robh+dt@...nel.org,
        krzysztof.kozlowski+dt@...aro.org, neil.armstrong@...aro.org,
        khilman@...libre.com, jbrunet@...libre.com,
        mturquette@...libre.com, vkoul@...nel.org, kishon@...nel.org,
        hminas@...opsys.com, Thinh.Nguyen@...opsys.com,
        yue.wang@...ogic.com, hanjie.lin@...ogic.com,
        kernel@...rdevices.ru, rockosov@...il.com,
        linux-usb@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-amlogic@...ts.infradead.org, linux-phy@...ts.infradead.org
Subject: Re: [PATCH v3 1/5] phy: amlogic: enable/disable clkin during Amlogic
 USB PHY init/exit

On Wed, Apr 26, 2023 at 12:29 PM Dmitry Rokosov
<ddrokosov@...rdevices.ru> wrote:
>
> Previously, all Amlogic boards used the XTAL clock as the default board
> clock for the USB PHY input, so there was no need to enable it.
> However, with the introduction of new Amlogic SoCs like the A1 family,
> the USB PHY now uses a gated clock. Hence, it is necessary to enable
> this gated clock during the PHY initialization sequence, or disable it
> during the PHY exit, as appropriate.
>
> Signed-off-by: Dmitry Rokosov <ddrokosov@...rdevices.ru>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@...glemail.com>