lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <CAFBinCD2FKHsOiHyEDSLmTt2CE_5rUNXgyE4og=XS4Vf1ht5hg@mail.gmail.com>
Date:   Mon, 1 May 2023 20:53:37 +0200
From:   Martin Blumenstingl <martin.blumenstingl@...glemail.com>
To:     Dmitry Rokosov <ddrokosov@...rdevices.ru>
Cc:     neil.armstrong@...aro.org, jbrunet@...libre.com,
        mturquette@...libre.com, sboyd@...nel.org, robh+dt@...nel.org,
        krzysztof.kozlowski+dt@...aro.org, khilman@...libre.com,
        jian.hu@...ogic.com, kernel@...rdevices.ru, rockosov@...il.com,
        linux-amlogic@...ts.infradead.org, linux-clk@...r.kernel.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH v14 4/6] clk: meson: a1: add Amlogic A1 PLL clock
 controller driver

On Wed, Apr 26, 2023 at 11:58 AM Dmitry Rokosov
<ddrokosov@...rdevices.ru> wrote:
>
> Introduce PLL clock controller for Amlogic A1 SoC family.
> The clock unit is an APB slave module that is designed for generating all
> of the internal and system clocks.
> The SoC uses an external 24MHz crystal; there are 4 internal PLLs:
> SYS_PLL/HIFI_PLL/USB_PLL/(FIXPLL), these PLLs generate 27 clock sources.
>
> Signed-off-by: Jian Hu <jian.hu@...ogic.com>
> Signed-off-by: Dmitry Rokosov <ddrokosov@...rdevices.ru>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@...glemail.com>

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ