linux-kernel - Re: [PATCH 1/2] dt-bindings: Add optional gpio property to uartps node to support rs485

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date:   Tue, 2 May 2023 12:57:22 +0200
From:   Michal Simek <michal.simek@....com>
To:     Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>,
        "Guntupalli, Manikanta" <manikanta.guntupalli@....com>,
        Rob Herring <robh@...nel.org>
Cc:     "gregkh@...uxfoundation.org" <gregkh@...uxfoundation.org>,
        "krzysztof.kozlowski+dt@...aro.org" 
        <krzysztof.kozlowski+dt@...aro.org>,
        "michal.simek@...inx.com" <michal.simek@...inx.com>,
        "linux-serial@...r.kernel.org" <linux-serial@...r.kernel.org>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "jirislaby@...nel.org" <jirislaby@...nel.org>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        "git (AMD-Xilinx)" <git@....com>,
        "Pandey, Radhey Shyam" <radhey.shyam.pandey@....com>,
        "Datta, Shubhrajyoti" <shubhrajyoti.datta@....com>,
        "Goud, Srinivas" <srinivas.goud@....com>,
        "manion05gk@...il.com" <manion05gk@...il.com>
Subject: Re: [PATCH 1/2] dt-bindings: Add optional gpio property to uartps
 node to support rs485



On 5/2/23 12:19, Krzysztof Kozlowski wrote:
> On 02/05/2023 12:14, Guntupalli, Manikanta wrote:
>> Hi Rob Herring,
>>
>>> -----Original Message-----
>>> From: Rob Herring <robh@...nel.org>
>>> Sent: Thursday, April 27, 2023 10:14 PM
>>> To: Guntupalli, Manikanta <manikanta.guntupalli@....com>
>>> Cc: gregkh@...uxfoundation.org; krzysztof.kozlowski+dt@...aro.org;
>>> michal.simek@...inx.com; linux-serial@...r.kernel.org;
>>> devicetree@...r.kernel.org; linux-kernel@...r.kernel.org;
>>> jirislaby@...nel.org; linux-arm-kernel@...ts.infradead.org; Simek, Michal
>>> <michal.simek@....com>; git (AMD-Xilinx) <git@....com>; Pandey,
>>> Radhey Shyam <radhey.shyam.pandey@....com>; Datta, Shubhrajyoti
>>> <shubhrajyoti.datta@....com>; Goud, Srinivas <srinivas.goud@....com>;
>>> manion05gk@...il.com
>>> Subject: Re: [PATCH 1/2] dt-bindings: Add optional gpio property to uartps
>>> node to support rs485
>>>
>>> On Wed, Apr 26, 2023 at 05:59:46PM +0530, Manikanta Guntupalli wrote:
>>>> Add optional gpio property to uartps node and add reference to rs485.yaml
>>>
>>> The diff tells me that already. Why?
>> Please check Figure 11-3 (Page number 37) in the below mentioned data sheet, It shows PMOD (ISOW14x2) devices used in half duplex configuration. Driver outputs Y and Z are shorted to A and B respectively. This reduces overall cabling requirements. Also DE/RE are shorted to each other, and at a time, any node acts as either a driver or a receiver.
>> Using above optional GPIO controlling driver or a receiver. This GPIO is optional because it is not required for uart console node.
>>
>> Here,
>> DE - Driver enable. If pin is floating, driver is disabled (internal pull-down resistor)
>> RE - Receiver enable. If pin is floating, receiver buffer is disabled (internal pull-up resistor)
>>
>> Datasheet:
>> https://www.ti.com/lit/ds/symlink/isow1432.pdf?ts=1682607122706&ref_url=https%253A%252F%252Fwww.ti.com%252Fproduct%252FISOW1432%252Fpart-details%252FISOW1432DFMR%253FkeyMatch%253DISOW1432DFMR%2526tisearch%253Dsearch-everything%2526usecase%253DOPN
> 
> Your request for us to get into some datasheet somewhere, to get the
> answer to the basic question, is not reasonable. Commit must justify its
> existence, not some external source.

Not really. Manual itself just shows picture of that connection if you are 
interested.
On schematics it looks like that DE and /RE are just handle via one gpio. That's 
why you need 3 wires instead of 4. Definitely it should be described better.

My concern was more about choosing proper name for this functionality.

Thanks,
Michal