lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Date:   Tue, 2 May 2023 20:12:56 -0400
From:   William Breathitt Gray <william.gray@...aro.org>
To:     Pavel Machek <pavel@....cz>
Cc:     Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        linux-iio@...r.kernel.org, linux-kernel@...r.kernel.org,
        Jonathan Cameron <jic23@...nel.org>, stable@...r.kernel.org
Subject: Re: [RESEND PATCH 5.15 v3 5/5] counter: 104-quad-8: Fix race
 condition between FLAG and CNTR reads

On Tue, May 02, 2023 at 10:19:07AM +0200, Pavel Machek wrote:
> Hi!
> 
> > On Tue, Apr 11, 2023 at 11:52:20AM -0400, William Breathitt Gray wrote:
> > > commit 4aa3b75c74603c3374877d5fd18ad9cc3a9a62ed upstream.
> > > 
> > > The Counter (CNTR) register is 24 bits wide, but we can have an
> > > effective 25-bit count value by setting bit 24 to the XOR of the Borrow
> > > flag and Carry flag. The flags can be read from the FLAG register, but a
> > > race condition exists: the Borrow flag and Carry flag are instantaneous
> > > and could change by the time the count value is read from the CNTR
> > > register.
> 
> > > Since the race condition could result in an incorrect 25-bit count
> > > value, remove support for 25-bit count values from this driver.
> 
> I believe usual solution is to read the carry, read the counter, and
> read the carry again. If old_carry = new_carry, we are pretty sure we
> did not hit the race, and can use 25 bit value.
> 
> Best regards,
> 									Pavel
> -- 
> People of Russia, stop Putin before his war on Ukraine escalates.

That solution might work if the counter only increases, but if the
counter is straddling the zero threshold then the Carry bit will toggle
as the count overflows, underflows, and overflows again. For example:

    * START
        * Carry=0,Count=MAX
    * > Counting up...
        * Carry=1,Count=0
    * DRIVER READS Carry=1
    * > Counting down...
        * Carry=1,Count=MAX
    * > Counting up...
        * Carry=0,Count=0
    * > Counting up...
        * Carry=0,Count=42
    * DRIVER READS Count=42
    * > Counting down...
        * Carry=1,Count=MAX
    * DRIVER READS Carry=1
        * old_carry = new_carry
    * FINAL COUNT: Carry=1,Count=42
        * This was never a state the counter actually reported

Ultimately, the issue is that we have no way to get both Carry and Count
atomically from the device. As long as there's a race condition there,
we can't prevent possibly misinterpreting the Carry and Count values, so
we unfortunately cannot ensure that our 25-bit Count value is an actual
state the counter reported.

William Breathitt Gray

Download attachment "signature.asc" of type "application/pgp-signature" (229 bytes)

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ