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Message-ID: <b57efeeb80319183e93d5a10bc8a812ff891bd53.camel@intel.com>
Date: Wed, 3 May 2023 23:23:59 +0000
From: "Huang, Kai" <kai.huang@...el.com>
To: "pbonzini@...hat.com" <pbonzini@...hat.com>,
"Christopherson,, Sean" <seanjc@...gle.com>
CC: "kvm@...r.kernel.org" <kvm@...r.kernel.org>,
"guoke@...ontech.com" <guoke@...ontech.com>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"haiwenyao@...ontech.com" <haiwenyao@...ontech.com>
Subject: Re: [PATCH 3/5] KVM: x86: Use MTRR macros to define possible MTRR MSR
ranges
On Wed, 2023-05-03 at 11:28 -0700, Sean Christopherson wrote:
> Use the MTRR macros to identify the ranges of possible MTRR MSRs instead
> of bounding the ranges with a mismash of open coded values and unrelated
> MSR indices. Carving out the gap for the machine check MSRs in particular
> is confusing, as it's easy to incorrectly think the case statement handles
> MCE MSRs instead of skipping them.
>
> Drop the range-based funneling of MSRs between the end of the MCE MSRs
> and MTRR_DEF_TYPE, i.e. 0x2A0-0x2FF, and instead handle MTTR_DEF_TYPE as
> the one-off case that it is.
>
> Extract PAT (0x277) as well in anticipation of dropping PAT "handling"
> from the MTRR code.
>
> Keep the range-based handling for the variable+fixed MTRRs even though
> capturing unknown MSRs 0x214-0x24F is arguably "wrong". There is a gap in
> the fixed MTRRs, 0x260-0x267, i.e. the MTRR code needs to filter out
> unknown MSRs anyways,
>
Looks a little bit half measure, but ...
> and using a single range generates marginally better
> code for the big switch statement.
could you educate why because I am ignorant of compiler behaviour? :)
>
> Signed-off-by: Sean Christopherson <seanjc@...gle.com>
> ---
> arch/x86/kvm/mtrr.c | 2 +-
> arch/x86/kvm/x86.c | 10 ++++++----
> 2 files changed, 7 insertions(+), 5 deletions(-)
>
> diff --git a/arch/x86/kvm/mtrr.c b/arch/x86/kvm/mtrr.c
> index 9fac1ec03463..d2c428f4ae42 100644
> --- a/arch/x86/kvm/mtrr.c
> +++ b/arch/x86/kvm/mtrr.c
> @@ -28,7 +28,7 @@
> static bool msr_mtrr_valid(unsigned msr)
> {
> switch (msr) {
> - case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
> + case MTRRphysBase_MSR(0) ... MTRRphysMask_MSR(KVM_NR_VAR_MTRR - 1):
> case MSR_MTRRfix64K_00000:
> case MSR_MTRRfix16K_80000:
> case MSR_MTRRfix16K_A0000:
> diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
> index e7f78fe79b32..8b356c9d8a81 100644
> --- a/arch/x86/kvm/x86.c
> +++ b/arch/x86/kvm/x86.c
> @@ -3700,8 +3700,9 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
> return 1;
> }
> break;
> - case 0x200 ... MSR_IA32_MC0_CTL2 - 1:
> - case MSR_IA32_MCx_CTL2(KVM_MAX_MCE_BANKS) ... 0x2ff:
> + case MSR_IA32_CR_PAT:
> + case MTRRphysBase_MSR(0) ... MSR_MTRRfix4K_F8000:
> + case MSR_MTRRdefType:
> return kvm_mtrr_set_msr(vcpu, msr, data);
> case MSR_IA32_APICBASE:
> return kvm_set_apic_base(vcpu, msr_info);
> @@ -4108,9 +4109,10 @@ int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
> msr_info->data = kvm_scale_tsc(rdtsc(), ratio) + offset;
> break;
> }
> + case MSR_IA32_CR_PAT:
> case MSR_MTRRcap:
> - case 0x200 ... MSR_IA32_MC0_CTL2 - 1:
> - case MSR_IA32_MCx_CTL2(KVM_MAX_MCE_BANKS) ... 0x2ff:
> + case MTRRphysBase_MSR(0) ... MSR_MTRRfix4K_F8000:
> + case MSR_MTRRdefType:
> return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
> case 0xcd: /* fsb frequency */
> msr_info->data = 3;
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