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Message-ID: <47e0d0cd1452383646a2cc9972f765b469fc51a6.camel@intel.com>
Date: Wed, 3 May 2023 23:26:44 +0000
From: "Huang, Kai" <kai.huang@...el.com>
To: "pbonzini@...hat.com" <pbonzini@...hat.com>,
"Christopherson,, Sean" <seanjc@...gle.com>
CC: "kvm@...r.kernel.org" <kvm@...r.kernel.org>,
"guoke@...ontech.com" <guoke@...ontech.com>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"haiwenyao@...ontech.com" <haiwenyao@...ontech.com>
Subject: Re: [PATCH 4/5] KVM: x86: WARN if writes to PAT MSR are handled by
common KVM code
On Wed, 2023-05-03 at 11:28 -0700, Sean Christopherson wrote:
> WARN and continue if a write to the PAT MSR reaches kvm_set_msr_common()
> now that both VMX and SVM handle PAT writes entirely on their own. Keep
> the case statement with a WARN instead of dropping it entirely to document
> why KVM's handling of reads and writes isn't symmetrical (reads are still
> handled by kvm_get_msr_common().
Why not just merge this patch with the next one?
>
> Signed-off-by: Sean Christopherson <seanjc@...gle.com>
> ---
> arch/x86/kvm/x86.c | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
> index 8b356c9d8a81..c36256d00250 100644
> --- a/arch/x86/kvm/x86.c
> +++ b/arch/x86/kvm/x86.c
> @@ -3701,6 +3701,12 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
> }
> break;
> case MSR_IA32_CR_PAT:
> + /*
> + * Writes to PAT should be handled by vendor code as both SVM
> + * and VMX track the guest's PAT in the VMCB/VMCS.
> + */
> + WARN_ON_ONCE(1);
> + fallthrough;
> case MTRRphysBase_MSR(0) ... MSR_MTRRfix4K_F8000:
> case MSR_MTRRdefType:
> return kvm_mtrr_set_msr(vcpu, msr, data);
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