linux-kernel - Re: [PATCH v5 5/7] iommu/vt-d: Prepare PASID attachment beyond RID

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Date:   Wed, 3 May 2023 14:49:36 +0800
From:   Baolu Lu <baolu.lu@...ux.intel.com>
To:     Jacob Pan <jacob.jun.pan@...ux.intel.com>,
        LKML <linux-kernel@...r.kernel.org>, iommu@...ts.linux.dev,
        Robin Murphy <robin.murphy@....com>,
        Jason Gunthorpe <jgg@...dia.com>,
        Joerg Roedel <joro@...tes.org>, dmaengine@...r.kernel.org,
        vkoul@...nel.org
Cc:     baolu.lu@...ux.intel.com, Will Deacon <will@...nel.org>,
        David Woodhouse <dwmw2@...radead.org>,
        Raj Ashok <ashok.raj@...el.com>,
        "Tian, Kevin" <kevin.tian@...el.com>, Yi Liu <yi.l.liu@...el.com>,
        "Yu, Fenghua" <fenghua.yu@...el.com>,
        Dave Jiang <dave.jiang@...el.com>,
        Tony Luck <tony.luck@...el.com>,
        "Zanussi, Tom" <tom.zanussi@...el.com>,
        narayan.ranganathan@...el.com
Subject: Re: [PATCH v5 5/7] iommu/vt-d: Prepare PASID attachment beyond
 RID_PASID

On 4/28/23 1:49 AM, Jacob Pan wrote:
> @@ -2433,12 +2477,17 @@ static int dmar_domain_attach_device_pasid(struct dmar_domain *domain,
>   					   struct intel_iommu *iommu,
>   					   struct device *dev, ioasid_t pasid)
>   {
> +	struct device_pasid_info *dev_pasid;
> +	unsigned long flags;
>   	int ret;
>   
> -	/* PASID table is mandatory for a PCI device in scalable mode. */
>   	if (!sm_supported(iommu) && dev_is_real_dma_subdevice(dev))
>   		return -EOPNOTSUPP;
>   
> +	dev_pasid = kzalloc(sizeof(*dev_pasid), GFP_KERNEL);
> +	if (!dev_pasid)
> +		return -ENOMEM;
> +
>   	if (hw_pass_through && domain_type_is_si(domain))
>   		ret = intel_pasid_setup_pass_through(iommu, domain, dev, pasid);
>   	else if (domain->use_first_level)
> @@ -2446,6 +2495,17 @@ static int dmar_domain_attach_device_pasid(struct dmar_domain *domain,
>   	else
>   		ret = intel_pasid_setup_second_level(iommu, domain, dev, pasid);
>   
> +	if (ret) {
> +		kfree(dev_pasid);
> +		return ret;
> +	}
> +
> +	dev_pasid->pasid = pasid;
> +	dev_pasid->dev = dev;
> +	spin_lock_irqsave(&domain->lock, flags);
> +	list_add(&dev_pasid->link_domain, &domain->dev_pasids);
> +	spin_unlock_irqrestore(&domain->lock, flags);
> +
>   	return 0;
>   }
>   
> @@ -2467,16 +2527,13 @@ static int dmar_domain_attach_device(struct dmar_domain *domain,
>   		return ret;
>   	info->domain = domain;
>   	spin_lock_irqsave(&domain->lock, flags);
> +	if (info->dev_attached) {
> +		spin_unlock_irqrestore(&domain->lock, flags);
> +		return 0;
> +	}
>   	list_add(&info->link, &domain->devices);
>   	spin_unlock_irqrestore(&domain->lock, flags);
>   
> -	ret = dmar_domain_attach_device_pasid(domain, iommu, dev,
> -					      IOMMU_DEF_RID_PASID);
> -	if (ret) {
> -		dev_err(dev, "Setup RID2PASID failed\n");
> -		device_block_translation(dev);
> -	}
> -
>   	ret = domain_context_mapping(domain, dev);
>   	if (ret) {
>   		dev_err(dev, "Domain context map failed\n");
> @@ -2485,8 +2542,9 @@ static int dmar_domain_attach_device(struct dmar_domain *domain,
>   	}
>   
>   	iommu_enable_pci_caps(info);
> +	info->dev_attached = 1;
>   
> -	return 0;
> +	return ret;
>   }
>   
>   static bool device_has_rmrr(struct device *dev)
> @@ -4044,6 +4102,7 @@ static void device_block_translation(struct device *dev)
>   
>   	spin_lock_irqsave(&info->domain->lock, flags);
>   	list_del(&info->link);
> +	info->dev_attached = 0;
>   	spin_unlock_irqrestore(&info->domain->lock, flags);
>   
>   	domain_detach_iommu(info->domain, iommu);
> @@ -4175,8 +4234,15 @@ static int intel_iommu_attach_device(struct iommu_domain *domain,
>   				     struct device *dev)
>   {
>   	struct device_domain_info *info = dev_iommu_priv_get(dev);
> +	struct dmar_domain *dmar_domain = to_dmar_domain(domain);
> +	struct intel_iommu *iommu;
> +	u8 bus, devfn;
>   	int ret;
>   
> +	iommu = device_to_iommu(dev, &bus, &devfn);
> +	if (!iommu)
> +		return -ENODEV;
> +
>   	if (domain->type == IOMMU_DOMAIN_UNMANAGED &&
>   	    device_is_rmrr_locked(dev)) {
>   		dev_warn(dev, "Device is ineligible for IOMMU domain attach due to platform RMRR requirement.  Contact your platform vendor.\n");
> @@ -4190,7 +4256,23 @@ static int intel_iommu_attach_device(struct iommu_domain *domain,
>   	if (ret)
>   		return ret;
>   
> -	return dmar_domain_attach_device(to_dmar_domain(domain), dev);
> +	ret = dmar_domain_attach_device(to_dmar_domain(domain), dev);
> +	if (ret) {
> +		dev_err(dev, "Attach device failed\n");
> +		return ret;
> +	}
> +
> +	/* PASID table is mandatory for a PCI device in scalable mode. */
> +	if (sm_supported(iommu) && !dev_is_real_dma_subdevice(dev)) {
> +		/* Setup the PASID entry for requests without PASID: */
> +		ret = dmar_domain_attach_device_pasid(dmar_domain, iommu, dev,
> +						      IOMMU_DEF_RID_PASID);
> +		if (ret) {
> +			dev_err(dev, "Setup RID2PASID failed\n");
> +			device_block_translation(dev);
> +		}
> +	}
> +	return ret;
>   }
>   
>   static int intel_iommu_map(struct iommu_domain *domain,

I am not following why do you need to change the attach_device path in
this patch. Perhaps you want to make sure that context entry for the
device is configured before attach_device_pasid?

Best regards,
baolu