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Message-ID: <ba50c423-2678-3865-8f9a-907480c9870a@kontron.de>
Date: Wed, 3 May 2023 17:51:58 +0200
From: Frieder Schrempf <frieder.schrempf@...tron.de>
To: Adam Ford <aford173@...il.com>, dri-devel@...ts.freedesktop.org
Cc: marex@...x.de, aford@...conembedded.com,
Chen-Yu Tsai <wenst@...omium.org>,
Andrzej Hajda <andrzej.hajda@...el.com>,
Neil Armstrong <neil.armstrong@...aro.org>,
Robert Foss <rfoss@...nel.org>,
Laurent Pinchart <Laurent.pinchart@...asonboard.com>,
Jonas Karlman <jonas@...boo.se>,
Jernej Skrabec <jernej.skrabec@...il.com>,
David Airlie <airlied@...il.com>,
Daniel Vetter <daniel@...ll.ch>,
Inki Dae <inki.dae@...sung.com>,
Jagan Teki <jagan@...rulasolutions.com>,
Marek Szyprowski <m.szyprowski@...sung.com>,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH V3 7/7] drm: bridge: samsung-dsim: Let blanking calcuation
work in non-burst mode
On 02.05.23 03:07, Adam Ford wrote:
> The blanking calculation currently uses burst_clk_rate for calculating
> the settings. Since it's possible to use this in non-burst mode, it's
> possible that where won't be burst_clk_rate. Instead, cache the
"possible that burst_clk_rate is 0"
> clock rate configured from of samsung_dsim_set_pll and use it instead.
>
> Signed-off-by: Adam Ford <aford173@...il.com> Tested-by: Chen-Yu Tsai <wenst@...omium.org>
Maybe this patch should be squashed into patch 6/7 as otherwise
burst_clk_rate could be 0 here causing bisection issues?
Apart from that:
Tested on Kontron BL i.MX8MM with SN65DSI84 and ADV7535 bridges.
Tested-by: Frieder Schrempf <frieder.schrempf@...tron.de>
Reviewed-by: Frieder Schrempf <frieder.schrempf@...tron.de>
> ---
> drivers/gpu/drm/bridge/samsung-dsim.c | 4 +++-
> include/drm/bridge/samsung-dsim.h | 1 +
> 2 files changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/bridge/samsung-dsim.c b/drivers/gpu/drm/bridge/samsung-dsim.c
> index 53099461cdc2..1dc913db2cb3 100644
> --- a/drivers/gpu/drm/bridge/samsung-dsim.c
> +++ b/drivers/gpu/drm/bridge/samsung-dsim.c
> @@ -652,6 +652,8 @@ static unsigned long samsung_dsim_set_pll(struct samsung_dsim *dsi,
> reg = samsung_dsim_read(dsi, DSIM_STATUS_REG);
> } while ((reg & DSIM_PLL_STABLE) == 0);
>
> + dsi->hs_clock = fout;
> +
> return fout;
> }
>
> @@ -960,7 +962,7 @@ static void samsung_dsim_set_display_mode(struct samsung_dsim *dsi)
> u32 reg;
>
> if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO) {
> - int byte_clk_khz = dsi->burst_clk_rate / 1000 / 8;
> + int byte_clk_khz = dsi->hs_clock / 1000 / 8;> int hfp = (m->hsync_start - m->hdisplay) * byte_clk_khz / m->clock;
> int hbp = (m->htotal - m->hsync_end) * byte_clk_khz / m->clock;
> int hsa = (m->hsync_end - m->hsync_start) * byte_clk_khz / m->clock;
> diff --git a/include/drm/bridge/samsung-dsim.h b/include/drm/bridge/samsung-dsim.h
> index 76ea8a1720cc..14176e6e9040 100644
> --- a/include/drm/bridge/samsung-dsim.h
> +++ b/include/drm/bridge/samsung-dsim.h
> @@ -94,6 +94,7 @@ struct samsung_dsim {
>
> u32 pll_clk_rate;
> u32 burst_clk_rate;
> + u32 hs_clock;
> u32 esc_clk_rate;
> u32 lanes;
> u32 mode_flags;
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