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Message-ID: <20230503182852.3431281-5-seanjc@google.com>
Date: Wed, 3 May 2023 11:28:51 -0700
From: Sean Christopherson <seanjc@...gle.com>
To: Sean Christopherson <seanjc@...gle.com>,
Paolo Bonzini <pbonzini@...hat.com>
Cc: kvm@...r.kernel.org, linux-kernel@...r.kernel.org,
Wenyao Hai <haiwenyao@...ontech.com>,
Ke Guo <guoke@...ontech.com>
Subject: [PATCH 4/5] KVM: x86: WARN if writes to PAT MSR are handled by common
KVM code
WARN and continue if a write to the PAT MSR reaches kvm_set_msr_common()
now that both VMX and SVM handle PAT writes entirely on their own. Keep
the case statement with a WARN instead of dropping it entirely to document
why KVM's handling of reads and writes isn't symmetrical (reads are still
handled by kvm_get_msr_common().
Signed-off-by: Sean Christopherson <seanjc@...gle.com>
---
arch/x86/kvm/x86.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index 8b356c9d8a81..c36256d00250 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -3701,6 +3701,12 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
}
break;
case MSR_IA32_CR_PAT:
+ /*
+ * Writes to PAT should be handled by vendor code as both SVM
+ * and VMX track the guest's PAT in the VMCB/VMCS.
+ */
+ WARN_ON_ONCE(1);
+ fallthrough;
case MTRRphysBase_MSR(0) ... MSR_MTRRfix4K_F8000:
case MSR_MTRRdefType:
return kvm_mtrr_set_msr(vcpu, msr, data);
--
2.40.1.495.gc816e09b53d-goog
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