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Message-ID: <ZFLNRsIt0pu1p9fQ@brian-x1>
Date:   Wed, 3 May 2023 17:08:22 -0400
From:   Brian Masney <bmasney@...hat.com>
To:     Andrew Halaney <ahalaney@...hat.com>
Cc:     linux-kernel@...r.kernel.org, agross@...nel.org,
        andersson@...nel.org, konrad.dybcio@...aro.org, robh+dt@...nel.org,
        krzysztof.kozlowski+dt@...aro.org, linux-arm-msm@...r.kernel.org,
        devicetree@...r.kernel.org
Subject: Re: [PATCH v6 0/2] Add EMAC3 support for sa8540p-ride (devicetree
 bits)

On Mon, May 01, 2023 at 03:51:03PM -0500, Andrew Halaney wrote:
> This is a forward port / upstream refactor of code delivered
> downstream by Qualcomm over at [0] to enable the DWMAC5 based
> implementation called EMAC3 on the sa8540p-ride dev board.
> 
> >From what I can tell with the board schematic in hand,
> as well as the code delivered, the main changes needed are:
> 
>     1. A new address space layout for dwmac5/EMAC3 MTL/DMA regs
>     2. A new programming sequence required for the EMAC3 base platforms
> 
> This series addresses the devicetree changes to support this
> hardware bringup.
> 
> As requested[1], it has been split up by compile deps / maintainer tree.
> The associated v4 of the netdev specific changes can be found at [2],
> and is merged.
> 
> The clock patch from this series was picked up from v5, leaving just the
> devicetree bits here.
> 
> Together, they result in the ethernet controller working for
> both controllers on this platform.

Reviewed-by: Brian Masney <bmasney@...hat.com>

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