lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <CAOnJCULThWh8RsDX9JHhYYGq_SyrG+jJcrp=UciqDPd73BoFtA@mail.gmail.com>
Date:   Fri, 5 May 2023 02:19:00 +0530
From:   Atish Patra <atishp@...shpatra.org>
To:     Viacheslav Mitrofanov <v.v.mitrofanov@...ro.com>
Cc:     linux@...ro.com, Andrew Jones <ajones@...tanamicro.com>,
        Anup Patel <anup@...infault.org>,
        Will Deacon <will@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        Paul Walmsley <paul.walmsley@...ive.com>,
        Palmer Dabbelt <palmer@...belt.com>,
        Albert Ou <aou@...s.berkeley.edu>,
        linux-riscv@...ts.infradead.org,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 1/1] perf: RISC-V: Limit the number of counters
 returned from SBI

On Thu, May 4, 2023 at 8:25 PM Viacheslav Mitrofanov
<v.v.mitrofanov@...ro.com> wrote:
>
> Perf gets the number of supported counters from SBI. If it happens that
> the number of returned counters more than RISCV_MAX_COUNTERS the code
> trusts it. It does not lead to an immediate problem but can potentially
> lead to it. Prevent getting more than RISCV_MAX_COUNTERS from SBI.
>
> Signed-off-by: Viacheslav Mitrofanov <v.v.mitrofanov@...ro.com>
> Reviewed-by: Andrew Jones <ajones@...tanamicro.com>
> ---
> Changes in v2:
> - Add new line
> - Substitute pr_warn for pr_info
>
>  drivers/perf/riscv_pmu_sbi.c | 6 ++++++
>  1 file changed, 6 insertions(+)
>
> diff --git a/drivers/perf/riscv_pmu_sbi.c b/drivers/perf/riscv_pmu_sbi.c
> index 70cb50fd41c2..9d07af2b6be0 100644
> --- a/drivers/perf/riscv_pmu_sbi.c
> +++ b/drivers/perf/riscv_pmu_sbi.c
> @@ -868,6 +868,12 @@ static int pmu_sbi_device_probe(struct platform_device *pdev)
>                 goto out_free;
>         }
>
> +       /* It is possible to get from SBI more than max number of counters */
> +       if (num_counters > RISCV_MAX_COUNTERS) {
> +               pr_info("SBI returned more than maximum number of counters\n");

Being a little verbose to provide a clear message ?
"Limiting the number of counters to %d


> +               num_counters = RISCV_MAX_COUNTERS;
> +       }
> +
>         /* cache all the information about counters now */
>         if (pmu_sbi_get_ctrinfo(num_counters, &cmask))
>                 goto out_free;
> --
> 2.37.2
>
>

Otherwise, LGTM.
Reviewed-by: Atish Patra <atishp@...osinc.com>


--
Regards,
Atish

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ