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Message-ID: <b204875e-3122-6af1-d9a4-6f57e96e5016@linaro.org>
Date: Sat, 6 May 2023 15:03:04 +0300
From: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
To: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>,
lpieralisi@...nel.org, kw@...ux.com, bhelgaas@...gle.com
Cc: robh@...nel.org, andersson@...nel.org, konrad.dybcio@...aro.org,
linux-pci@...r.kernel.org, linux-arm-msm@...r.kernel.org,
linux-kernel@...r.kernel.org, steev@...i.org,
quic_srichara@...cinc.com
Subject: Re: [PATCH 2/8] PCI: qcom: Disable write access to read only
registers for IP v2.9.0
On 06/05/2023 14:44, Dmitry Baryshkov wrote:
> On 06/05/2023 10:31, Manivannan Sadhasivam wrote:
>> In the post init sequence of v2.9.0, write access to read only registers
>> are not disabled after updating the registers. Fix it by disabling the
>> access after register update.
>>
>> Fixes: 0cf7c2efe8ac ("PCI: qcom: Add IPQ60xx support")
>> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
>> ---
>> drivers/pci/controller/dwc/pcie-qcom.c | 3 +++
>> 1 file changed, 3 insertions(+)
>
> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@...il.com>
>
Of course:
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
--
With best wishes
Dmitry
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