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Message-ID: <20230507-sleeve-tacky-21e817e31fb2@spud>
Date: Sun, 7 May 2023 22:22:16 +0100
From: Conor Dooley <conor@...nel.org>
To: Jisheng Zhang <jszhang@...nel.org>
Cc: Thomas Gleixner <tglx@...utronix.de>,
Marc Zyngier <maz@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>,
Palmer Dabbelt <palmer@...belt.com>,
Paul Walmsley <paul.walmsley@...ive.com>,
Albert Ou <aou@...s.berkeley.edu>,
linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
linux-riscv@...ts.infradead.org, Guo Ren <guoren@...nel.org>
Subject: Re: [PATCH 2/5] riscv: Add the T-HEAD SoC family Kconfig option
On Mon, May 08, 2023 at 02:23:01AM +0800, Jisheng Zhang wrote:
> The first SoC in the T-HEAD series is light(a.k.a th1520), containing
> quad T-HEAD C910 cores.
>
> Signed-off-by: Jisheng Zhang <jszhang@...nel.org>
> ---
> arch/riscv/Kconfig.socs | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
> index 1cf69f958f10..ce10a38dff37 100644
> --- a/arch/riscv/Kconfig.socs
> +++ b/arch/riscv/Kconfig.socs
> @@ -41,6 +41,12 @@ config ARCH_SUNXI
> This enables support for Allwinner sun20i platform hardware,
> including boards based on the D1 and D1s SoCs.
>
> +config ARCH_THEAD
Could you please add a defconfig patch, adding this option, so that we
build support for this platform by default?
Thanks,
Conor.
> + bool "T-HEAD RISC-V SoCs"
> + select ERRATA_THEAD
> + help
> + This enables support for the RISC-V based T-HEAD SoCs.
> +
> config ARCH_VIRT
> def_bool SOC_VIRT
>
> --
> 2.40.0
>
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