linux-kernel - Re: [PATCH 4/5] riscv: dts: thead: add sipeed Lichee Pi 4A board device tree

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Message-ID: <CAJF2gTQ+p=GLH985Ce-_gCP23N0CN2yEp3C=-+05cUo05R+YHQ@mail.gmail.com>
Date:   Mon, 8 May 2023 14:44:49 +0800
From:   Guo Ren <guoren@...nel.org>
To:     Jisheng Zhang <jszhang@...nel.org>
Cc:     Thomas Gleixner <tglx@...utronix.de>,
        Marc Zyngier <maz@...nel.org>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Conor Dooley <conor+dt@...nel.org>,
        Palmer Dabbelt <palmer@...belt.com>,
        Paul Walmsley <paul.walmsley@...ive.com>,
        Albert Ou <aou@...s.berkeley.edu>,
        linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
        linux-riscv@...ts.infradead.org
Subject: Re: [PATCH 4/5] riscv: dts: thead: add sipeed Lichee Pi 4A board
 device tree

On Mon, May 8, 2023 at 2:34 AM Jisheng Zhang <jszhang@...nel.org> wrote:
>
> Sipeed's Lichee Pi 4A development board uses Lichee Module 4A core
> module which is powered by T-HEAD's light(a.k.a TH1520) SoC. Add
No light, just th1520.

> minimal device tree files for the core module and the development
> board.
>
> Support basic uart/gpio/dmac drivers, so supports booting to a basic
> shell.
>
> Signed-off-by: Jisheng Zhang <jszhang@...nel.org>
> ---
>  arch/riscv/boot/dts/Makefile                  |  1 +
>  arch/riscv/boot/dts/thead/Makefile            |  2 +
>  .../dts/thead/light-lichee-module-4a.dtsi     | 38 +++++++++++++++++++
>  .../boot/dts/thead/light-lichee-pi-4a.dts     | 32 ++++++++++++++++
>  4 files changed, 73 insertions(+)
>  create mode 100644 arch/riscv/boot/dts/thead/Makefile
>  create mode 100644 arch/riscv/boot/dts/thead/light-lichee-module-4a.dtsi
>  create mode 100644 arch/riscv/boot/dts/thead/light-lichee-pi-4a.dts
>
> diff --git a/arch/riscv/boot/dts/Makefile b/arch/riscv/boot/dts/Makefile
> index f0d9f89054f8..1e884868ccba 100644
> --- a/arch/riscv/boot/dts/Makefile
> +++ b/arch/riscv/boot/dts/Makefile
> @@ -2,6 +2,7 @@
>  subdir-y += allwinner
>  subdir-y += sifive
>  subdir-y += starfive
> +subdir-y += thead
>  subdir-y += canaan
>  subdir-y += microchip
>  subdir-y += renesas
> diff --git a/arch/riscv/boot/dts/thead/Makefile b/arch/riscv/boot/dts/thead/Makefile
> new file mode 100644
> index 000000000000..9e00acc714cc
> --- /dev/null
> +++ b/arch/riscv/boot/dts/thead/Makefile
> @@ -0,0 +1,2 @@
> +# SPDX-License-Identifier: GPL-2.0
> +dtb-$(CONFIG_ARCH_THEAD) += light-lichee-pi-4a.dtb
> diff --git a/arch/riscv/boot/dts/thead/light-lichee-module-4a.dtsi b/arch/riscv/boot/dts/thead/light-lichee-module-4a.dtsi
> new file mode 100644
> index 000000000000..24c9971e0fb5
> --- /dev/null
> +++ b/arch/riscv/boot/dts/thead/light-lichee-module-4a.dtsi
> @@ -0,0 +1,38 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Copyright (C) 2023 Jisheng Zhang <jszhang@...nel.org>
> + */
> +
> +/dts-v1/;
> +
> +#include "light.dtsi"
> +
> +/ {
> +       model = "Sipeed Lichee Module 4A";
> +       compatible = "sipeed,lichee-module-4a", "thead,light";
no light, th1520
> +
> +       memory@0 {
> +               device_type = "memory";
> +               reg = <0x0 0x00000000 0x2 0x00000000>;
> +       };
> +};
> +
> +&osc {
> +       clock-frequency = <24000000>;
> +};
> +
> +&osc_32k {
> +       clock-frequency = <32768>;
> +};
> +
> +&apb_clk {
> +       clock-frequency = <62500000>;
> +};
> +
> +&uart_sclk {
> +       clock-frequency = <100000000>;
> +};
> +
> +&dmac0 {
> +       status = "okay";
> +};
> diff --git a/arch/riscv/boot/dts/thead/light-lichee-pi-4a.dts b/arch/riscv/boot/dts/thead/light-lichee-pi-4a.dts
> new file mode 100644
> index 000000000000..4f0ba2149d2d
> --- /dev/null
> +++ b/arch/riscv/boot/dts/thead/light-lichee-pi-4a.dts
> @@ -0,0 +1,32 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Copyright (C) 2023 Jisheng Zhang <jszhang@...nel.org>
> + */
> +
> +#include "light-lichee-module-4a.dtsi"
> +
> +/ {
> +       model = "Sipeed Lichee Pi 4A";
> +       compatible = "sipeed,lichee-pi-4a", "sipeed,lichee-module-4a", "thead,light";
no light, th1520
> +
> +       aliases {
> +               gpio0 = &gpio0;
> +               gpio1 = &gpio1;
> +               gpio2 = &gpio2;
> +               gpio3 = &gpio3;
> +               serial0 = &uart0;
> +               serial1 = &uart1;
> +               serial2 = &uart2;
> +               serial3 = &uart3;
> +               serial4 = &uart4;
> +               serial5 = &uart5;
> +       };
> +
> +       chosen {
> +               stdout-path = "serial0:115200n8";
> +       };
> +};
> +
> +&uart0 {
> +       status = "okay";
> +};
> --
> 2.40.0
>


-- 
Best Regards
 Guo Ren