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Message-ID: <20230508-purely-radar-8fb16747ba60@wendy>
Date: Mon, 8 May 2023 09:23:26 +0100
From: Conor Dooley <conor.dooley@...rochip.com>
To: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
CC: Richard Zhu <hongxing.zhu@....com>,
Lucas Stach <l.stach@...gutronix.de>,
Bjorn Helgaas <bhelgaas@...gle.com>,
Lorenzo Pieralisi <lpieralisi@...nel.org>,
Krzysztof WilczyĆski <kw@...ux.com>,
Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>,
Shawn Guo <shawnguo@...nel.org>,
Sascha Hauer <s.hauer@...gutronix.de>,
Pengutronix Kernel Team <kernel@...gutronix.de>,
Fabio Estevam <festevam@...il.com>,
NXP Linux Team <linux-imx@....com>,
<linux-pci@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH fixes] dt-bindings: PCI: fsl,imx6q: fix assigned-clocks
warning
On Mon, May 08, 2023 at 09:18:37AM +0200, Krzysztof Kozlowski wrote:
> @@ -49,6 +62,31 @@ required:
> allOf:
> - $ref: /schemas/pci/snps,dw-pcie-ep.yaml#
> - $ref: /schemas/pci/fsl,imx6q-pcie-common.yaml#
> + - if:
> + properties:
> + compatible:
> + enum:
> + - fsl,imx8mq-pcie-ep
How come this is enum rather than const (and same for the other
single-compatible ones below)?
Cheers,
Conor.
> + then:
> + properties:
> + clocks:
> + minItems: 4
> + clock-names:
> + items:
> + - const: pcie
> + - const: pcie_bus
> + - const: pcie_phy
> + - const: pcie_aux
> + else:
> + properties:
> + clocks:
> + maxItems: 3
> + clock-names:
> + items:
> + - const: pcie
> + - const: pcie_bus
> + - const: pcie_aux
> +
>
> unevaluatedProperties: false
>
> diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
> index 2443641754d3..81bbb8728f0f 100644
> --- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
> +++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
> @@ -40,6 +40,19 @@ properties:
> - const: dbi
> - const: config
>
> + clocks:
> + minItems: 3
> + items:
> + - description: PCIe bridge clock.
> + - description: PCIe bus clock.
> + - description: PCIe PHY clock.
> + - description: Additional required clock entry for imx6sx-pcie,
> + imx6sx-pcie-ep, imx8mq-pcie, imx8mq-pcie-ep.
> +
> + clock-names:
> + minItems: 3
> + maxItems: 4
> +
> interrupts:
> items:
> - description: builtin MSI controller.
> @@ -77,6 +90,70 @@ required:
> allOf:
> - $ref: /schemas/pci/snps,dw-pcie.yaml#
> - $ref: /schemas/pci/fsl,imx6q-pcie-common.yaml#
> + - if:
> + properties:
> + compatible:
> + enum:
> + - fsl,imx6sx-pcie
> + then:
> + properties:
> + clocks:
> + minItems: 4
> + clock-names:
> + items:
> + - const: pcie
> + - const: pcie_bus
> + - const: pcie_phy
> + - const: pcie_inbound_axi
> +
> + - if:
> + properties:
> + compatible:
> + enum:
> + - fsl,imx8mq-pcie
> + then:
> + properties:
> + clocks:
> + minItems: 4
> + clock-names:
> + items:
> + - const: pcie
> + - const: pcie_bus
> + - const: pcie_phy
> + - const: pcie_aux
> +
> + - if:
> + properties:
> + compatible:
> + enum:
> + - fsl,imx6q-pcie
> + - fsl,imx6qp-pcie
> + - fsl,imx7d-pcie
> + then:
> + properties:
> + clocks:
> + maxItems: 3
> + clock-names:
> + items:
> + - const: pcie
> + - const: pcie_bus
> + - const: pcie_phy
> +
> + - if:
> + properties:
> + compatible:
> + enum:
> + - fsl,imx8mm-pcie
> + - fsl,imx8mp-pcie
> + then:
> + properties:
> + clocks:
> + maxItems: 3
> + clock-names:
> + items:
> + - const: pcie
> + - const: pcie_bus
> + - const: pcie_aux
>
> unevaluatedProperties: false
>
> --
> 2.34.1
>
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