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Date: Tue, 9 May 2023 08:27:55 +0300
From: Claudiu Beznea <claudiu.beznea@...rochip.com>
To: <mturquette@...libre.com>, <sboyd@...nel.org>,
<robh+dt@...nel.org>, <krzysztof.kozlowski+dt@...aro.org>,
<nicolas.ferre@...rochip.com>, <alexandre.belloni@...tlin.com>
CC: <linux-clk@...r.kernel.org>, <devicetree@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>,
Claudiu Beznea <claudiu.beznea@...rochip.com>
Subject: [PATCH v3 3/5] ARM: dts: at91: at91sam9n12: witch sckc to new clock bindings
Switch slow clock controller to new clock bindings.
Signed-off-by: Claudiu Beznea <claudiu.beznea@...rochip.com>
---
arch/arm/boot/dts/at91sam9n12.dtsi | 23 +++--------------------
1 file changed, 3 insertions(+), 20 deletions(-)
diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi b/arch/arm/boot/dts/at91sam9n12.dtsi
index c2e7460fb7ff..0e28101b26bf 100644
--- a/arch/arm/boot/dts/at91sam9n12.dtsi
+++ b/arch/arm/boot/dts/at91sam9n12.dtsi
@@ -146,28 +146,11 @@ shdwc@...ffe10 {
clocks = <&clk32k>;
};
- sckc@...ffe50 {
+ clk32k: clock-controller@...ffe50 {
compatible = "atmel,at91sam9x5-sckc";
reg = <0xfffffe50 0x4>;
-
- slow_osc: slow_osc {
- compatible = "atmel,at91sam9x5-clk-slow-osc";
- #clock-cells = <0>;
- clocks = <&slow_xtal>;
- };
-
- slow_rc_osc: slow_rc_osc {
- compatible = "atmel,at91sam9x5-clk-slow-rc-osc";
- #clock-cells = <0>;
- clock-frequency = <32768>;
- clock-accuracy = <50000000>;
- };
-
- clk32k: slck {
- compatible = "atmel,at91sam9x5-clk-slow";
- #clock-cells = <0>;
- clocks = <&slow_rc_osc>, <&slow_osc>;
- };
+ clocks = <&slow_xtal>;
+ #clock-cells = <0>;
};
mmc0: mmc@...08000 {
--
2.34.1
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